First, please excuse my limited knowledge of electronics and signalling; I'm a programmer, not an engineer.
I am working on building a Game Boy cartridge, and I was hoping to use some AT27LV520 that I have due to having a low profile (Datasheet here).
The Game Boy's cartridge port exposes the entire address bus, the data bus, and a 1MHz clock. Other pins (/CS, /RD, /WR) are only relevant for accessing cartridge RAM. Accessing cartridge ROM is any access when A15 is low. Based on timings here, once A15 is low, the address bus is set, and data must be presented on D0-D7 by the time CLK goes low, which is about 350 ns. Simple enough.
But wait! The Atmel ROMs I have multiplexes the data and address pins. So, the address must be presented, then deasserted so the ROM can assert data on those pins. This can be done with a latch (like a 74LS373) put on the address pins, then assert /OE, no latching necessary. Even that seems excessive; some 74 series part that is basically 8 transistors would do the job.
But what about ALE and /OE? Because the bus as presented isn't multiplexed, no ALE or /OE is generated. I would have to generate them myself. It seems simple: Once A15 goes low, then bring ALE high for 70 ns, wait 12 ns, float the lower 8 address pins (bring the latch's /OE low), wait 13 ns, then pull /OE low until the clock falls. There's enough time to do all of that (at least on paper), but I don't know how to generate those signals with timings like that outside of using a microcontroller, which seems excessive for this task; there's no logic, just blaring signals once one input falls.
More generally, I can't be the first one to want to place a multiplexed memory onto a non multiplexed bus, so it seems there should be a part out there that would take care of this for me. What can I do?