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I would like to switch from Xilinx to Efinix FPGAs, but it looks like Efinix is using a quite different design idea for the logical units.

I have a Device Utilization Summary for the Xilinx FPGA we are using. It is listing Number of Slice Registers, Number of Slice LUTs, Number of occupied Slices, etc.

How to calculate the needed elements in terms of Efinix Trion FPGA's?

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it looks like Efinix is using a quite different design idea for the logical units.

Yep, different slice designs is what typically sets FPGA series apart.

How to calculate the needed elements in terms of Efinix Trion FPGA's?

Impossible, as that's simply different hardware, and there's no direct translation between one technology and the other: If you need, for example, 2 Efinix slices for one 6-LUT (part of one Xilinx series 7 slice), then sure, your number of necessary slices doubles there. But also, that means routing becomes more complicated, so you might need to distribute further; which in turn means more registers/fanout buffers need to be inserted; and so on. Of course, that problem doesn't arise in that form, because you'd not take the netlist for the Xilinx FPGA and translate it to Efinix FPGA resources, you'd re-synthesize, which would lead to different kinds of LUTs being targeted - and that might make the problem less bad than, or more bad; impossible to tell.

So, you'll have to synthesize/PnR for the Trion FPGA, and look at the report. No way around that. In my experience, some things map well to some FPGA types and terrible to others; even "order of magnitude" comparisons are typically off.

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  • \$\begingroup\$ that's note the answer I hoped for, but it is useful nontheless. thank you! \$\endgroup\$
    – tollo
    Feb 21, 2022 at 13:35

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