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This is one of my first attempt of designing PCB. From my last question, I updated my schematic, solved issues. This is how the PCB looks now - enter image description here This is the easyeda project: https://easyeda.com/editor#id=!d4695d2e28b347b49fa463fa0df61897|ce80afceb054496b9520f2cebb2ee0a2|2ba98302e4d043d18d1781da77646577

What are some possible improvements?

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    \$\begingroup\$ As i mentioned in your other question- your top ground fill is too broken up to be useful. Have the gnd fill on the bottom side and attempt to make it as unbroken as possible. And fatten up your power tracks. Minimise the inductance. \$\endgroup\$
    – Kartman
    Feb 22, 2022 at 4:24
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    \$\begingroup\$ Power supply traces are very skinny, if you rotate U1 90 degrees clockwise it will simplify a lot of the routing and let you move the crystal closer to U1 (and keep the crystal traces on the top without vias). Assuming U2 and U4 are LDOs, you want bypass caps very close to these packages on both the input and output.- The USB routing is bad enough it may not work. D1 should be inline between the connector and the USB->uart, the datasheet for D1 should have examples for routing. \$\endgroup\$ Feb 22, 2022 at 4:26
  • \$\begingroup\$ @Kartman will it work if i manually fill copper area? \$\endgroup\$
    – Abrar
    Feb 22, 2022 at 4:49
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    \$\begingroup\$ @Kartman On the other hand, it's good there is even a ground fill at all. Most first boards on here don't have one at all. \$\endgroup\$
    – DKNguyen
    Feb 22, 2022 at 5:06
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    \$\begingroup\$ That’s because the autorouter doesn’t do it! \$\endgroup\$
    – Kartman
    Feb 22, 2022 at 5:13

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As some of the comments have mentioned, ground is important. You definitely want to at least add some ground pour to the bottom side of the PCB, and then connect the two ground pours with GND vias. Don't be shy with the GND vias.

Then, regarding crystals, as a rule of thumb, keep this in mind:

  • Keep the traces for the crystals as short as possible
  • Keep the two traces length matched as far as possible, in some cases this doesn't matter, but it's good practice (click on the trace, and the properties on the right will give you the length, add some squigles. You can also click on route->track length tuning).
  • Keep the location from the crystal to the load caps similar for the two of them (don't put one close to the IC, and another far, or things like that).

Your power traces are not too thin in my opinion, depending on what you want to drive. You can calculate the current a trace can carry using an online calculator. But for an Atmega328P, you should be fine with at least 0.3mm traces. As a rule of thumb, I usually use 1mm per 1A give or take. And for more important power traces, I go for wider, or use an internal plane.

Your decoupling capacitors are important (this is super important actually). Place them close to the power pins of the IC. Try to have one on each of the power inputs to the IC. The GND pin of the cap should have a good return path to the IC (its GND should be straight connected to the IC GND with a track as short as possible). Place some GND vias underneath the IC to help with this and with heat sinking. Also, unless you know what you are doing with the caps, use the same value caps for decoupling (0.1u is a good value). If you have them as different values, it could end up making your board noisy electronically, as one cap behaves like an inductor at high frequency, while the other is still behaving like a cap, causing an LC resonator built right into your power rail.

For the CH340, I have found that they can keep the IC in a reset state. So, I like to put a 0.1u cap in series with the DTR to RESET line. This resets the IC, but doesn't keep it off.

Always think about current returns. In this case, the current return to GND of the USB, has to go around the components at the bottom, which is non-ideal. Using a GND pour on the bottom will help too, with some GND vias near the GND of the USB.

For the USB traces, I think this board will work since you are below the critical length for USB2.0. Normally, you would want to do some impedance calculations, and go with a 4 layer board so that the impedance can be well controlled. In this case, if possible, fatten up the USB differential pair to about 0.8mm (until the connector), and if you can, order a 1mm board instead of 1.6mm. There is a lot to learn with differential pairs, google has some great articles. Also, there should be a continuous GND return path connected to the IC (CH340) and the connector underneath the differential pair traces. (Also try match the length of the USB P and USB N traces to within 1mm if possible).

These are just some pointers from the top of my head, but in general for a first board, that is amazing! Well done :)

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    \$\begingroup\$ It’s a small matter but I avoid having more than a 45 degree angle in a track, use two or more with a little separation as needed. This has a little electrical benefit for high frequency and high voltage applications, but also aids the manufacturing process. \$\endgroup\$
    – Frog
    Feb 22, 2022 at 6:24
  • \$\begingroup\$ Thanks for the suggestions! This site has helped me much :D \$\endgroup\$
    – Abrar
    Feb 22, 2022 at 7:25

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