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This is one of my first attempt of designing PCB. From my last question, I updated my schematic, solved issues. This is how the PCB looks now -
This is the easyeda project: https://easyeda.com/editor#id=!d4695d2e28b347b49fa463fa0df61897|ce80afceb054496b9520f2cebb2ee0a2|2ba98302e4d043d18d1781da77646577
What are some possible improvements?
As some of the comments have mentioned, ground is important. You definitely want to at least add some ground pour to the bottom side of the PCB, and then connect the two ground pours with GND vias. Don't be shy with the GND vias.
Then, regarding crystals, as a rule of thumb, keep this in mind:
Your power traces are not too thin in my opinion, depending on what you want to drive. You can calculate the current a trace can carry using an online calculator. But for an Atmega328P, you should be fine with at least 0.3mm traces. As a rule of thumb, I usually use 1mm per 1A give or take. And for more important power traces, I go for wider, or use an internal plane.
Your decoupling capacitors are important (this is super important actually). Place them close to the power pins of the IC. Try to have one on each of the power inputs to the IC. The GND pin of the cap should have a good return path to the IC (its GND should be straight connected to the IC GND with a track as short as possible). Place some GND vias underneath the IC to help with this and with heat sinking. Also, unless you know what you are doing with the caps, use the same value caps for decoupling (0.1u is a good value). If you have them as different values, it could end up making your board noisy electronically, as one cap behaves like an inductor at high frequency, while the other is still behaving like a cap, causing an LC resonator built right into your power rail.
For the CH340, I have found that they can keep the IC in a reset state. So, I like to put a 0.1u cap in series with the DTR to RESET line. This resets the IC, but doesn't keep it off.
Always think about current returns. In this case, the current return to GND of the USB, has to go around the components at the bottom, which is non-ideal. Using a GND pour on the bottom will help too, with some GND vias near the GND of the USB.
For the USB traces, I think this board will work since you are below the critical length for USB2.0. Normally, you would want to do some impedance calculations, and go with a 4 layer board so that the impedance can be well controlled. In this case, if possible, fatten up the USB differential pair to about 0.8mm (until the connector), and if you can, order a 1mm board instead of 1.6mm. There is a lot to learn with differential pairs, google has some great articles. Also, there should be a continuous GND return path connected to the IC (CH340) and the connector underneath the differential pair traces. (Also try match the length of the USB P and USB N traces to within 1mm if possible).
These are just some pointers from the top of my head, but in general for a first board, that is amazing! Well done :)
