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I can turn on/off an AO3400 even across my body by touching the gate with my hand and the +/- pole of a 3V battery with the other, and it stays on even if I leave my finger by the gate capacitence. Now I want to invert a reed relay's output for a door open detector, because the MCU in deepsleep mode still consumes about 80uA on a LOW input thanks to the pull-up resistor. With this method the batterylife will be extended a little. So my question is, will this work on a long term or maybe the MOSFET won't open after a while. I read triacs getting less sensitive with time, but I didn't find anything about MOSFETs. Thanks for your answer.

enter image description here

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    \$\begingroup\$ Quick thought: perhaps you could disable the internal pull-up, and use a larger external one? That might fix your issue without an additional mosfet. \$\endgroup\$
    – marcelm
    Feb 22, 2022 at 19:15
  • \$\begingroup\$ Wait a second, how exactly does your PA2 get high? What is it powered with? I can see it's low when the mosfet is conducting, but how is it supposed to get high? Oh I didn't consider pullup. Yeah, agree, @marcelm \$\endgroup\$
    – Ilya
    Feb 22, 2022 at 19:15
  • \$\begingroup\$ How does it work? the finger? the missing magnet force on the reed relay? the current switch and the sleep mode ? Explain all assumptions takes place . It can certainly be done better whatever it is. \$\endgroup\$ Feb 22, 2022 at 19:18
  • \$\begingroup\$ Thanks for the advice @marcelm. I gave a try with 100k pulldown (disabled pullup) and it worked fine, but I forgot to try a larger pullup. \$\endgroup\$
    – FFeller
    Feb 22, 2022 at 19:57
  • \$\begingroup\$ @TonyStewartEE75. When the door closed SW1 conducts so Vgs=0 so Q1 closed. When the magnet moves away by opening the door SW1 will open so Vgs=+BATT so Q1 will open and shorts PA2 to -BATT. In this case current flows through PA2's pullup resistor. If I connect SW1 to PA2 directly current flows when the door is closed so in most of the time. \$\endgroup\$
    – FFeller
    Feb 22, 2022 at 19:57

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ESD is a major concern if you have a FET gate directly exposed. Static discharge is likely to erode the device each time you tough it and eventually it will fail. You can get protection devices intended for USB data lines that would minimise this effect. That said, the threshold voltage of a FET does not tend to vary with age, in my experience.

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  • \$\begingroup\$ Thank you for your answer. I thought may be the resistance between the Gate and Source could get lower after a time which wouldn't be a problem most of the cases but here, because it would decrease the Vgs. \$\endgroup\$
    – FFeller
    Feb 22, 2022 at 20:04
  • \$\begingroup\$ @FFeller Decreasing Vgs is, to an extent, a good thing in this circuit. So I don’t understand the concern. \$\endgroup\$ Feb 22, 2022 at 20:42
  • \$\begingroup\$ I meant the voltage what really appears between the gate and the source, not what needs to open the FET. \$\endgroup\$
    – FFeller
    Feb 22, 2022 at 21:48
  • \$\begingroup\$ The leakage between gate and source is very low, so you could think of it as a very large resistance, and infinite for most purposes. The capacitance of the gate is more significant in most cases. ESD damage could cause the leakage to increase, but could also cause other failure modes. \$\endgroup\$
    – Frog
    Feb 23, 2022 at 0:00

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