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Im trying to implement a jk flip flop gate level in verilog using nand gates but for some weird reason i dont get a proper output.

Schematic of JKFF

Here is my jk flip flop module:

module jk_flip_flop(q, q_bar, j, k, clk);

output q, q_bar;
input j, k, clk;
wire j_star, k_star;

    nand(j_star, q_bar, j, clk);
    nand(k_star, clk, k, q);
    nand(q, j_star, q_bar);
    nand(q_bar, q, k_star);

endmodule

and this is the testbench:

module tb_jk_flip_flop();

reg j, k, clk;
wire q, q_bar;

jk_flip_flop jkff(q, q_bar, j, k, clk);

initial
begin
    
    j = 1;
    clk = 1;
    k = 0;
    #100;
    $display("q = %d, q_bar = %d", q, q_bar);

    j = 0;
    clk = 1;
    k = 1;
    #100;
    $display("q = %d, q_bar = %d", q, q_bar);

    j = 1;
    clk = 1;
    k = 1;
    #100;
    $display("q = %d, q_bar = %d", q, q_bar);


end

endmodule

this compiles and runs successfully but gives the following output:

q = x, q_bar = x
q = x, q_bar = x
q = x, q_bar = x

Please correct my code i know there is a mistake but i dont know where im wrong.

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  • \$\begingroup\$ "Please correct my code"...sorry, that is not how this works. You need to show us that you have made a substantial effort to solve this yourself. In this case you have a simulation so you can check the state of internal nodes. What do j_star and k_star look like? Do you have a truth table for this circuit, so you know what to expect? \$\endgroup\$ Feb 27, 2022 at 16:35

1 Answer 1

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You don’t actually have a flip-flop. What you have is a gated jk latch.

When all three inputs are high, the latch will oscillate. This is due to the feedback path formed from the outputs to the pair of gates on the input.

More here: JK latch, possible Ben Eater error?

That said, your test bench never toggles clock. Is that your intention?

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  • \$\begingroup\$ Oh so thats the problem. Can you please provide me a jk flip flop schematic please? \$\endgroup\$
    – Sahar
    Feb 27, 2022 at 16:38
  • \$\begingroup\$ I added a link. \$\endgroup\$ Feb 27, 2022 at 16:52
  • \$\begingroup\$ So according to the answer, i.stack.imgur.com/h5R0Wm.png is the JK Flip Flop right? \$\endgroup\$
    – Sahar
    Feb 27, 2022 at 17:37
  • \$\begingroup\$ That’s just one way. You can also construct it with NAND. \$\endgroup\$ Feb 27, 2022 at 17:42

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