I am trying to design and build a boost converter with the TI TL5001 PWM controller, to convert 9 VDC to 400 VDC to supply a Geiger-Müller tube. This is my first boost converter with an analog controller, although I have some experience with flyback converters without analog regulation.
I tried to work from the circuit given in a manual from MIT for this application. This circuit has been discussed in another post, and the author allegedly got it to work. However, I would like to understand better how the design works, as I don't find the same values when following the suggestions in the datasheet.
It doesn't seem to work if I use the circuit I have provided below. The power switching circuit works by itself, and I can get the output of the controller to switch and adjust the duty cycle 0-100% by taking out C3 in the compensator circuit and manually adjusting the feedback voltage between approximately 0.7 and 1.4 V. (I have basic knowledge of control theory and I guess I have to take out the capacitor because it otherwise charges/integrates and activates SCP of the controller. See the bottom figure.)
A few notes on my design:
I use a 500 kΩ resistor on RT for a 25 kHz switching frequency.
If a want to limit the duty cycle (which I guess I have to) the datasheet gives a formula for the DTC resistor, which gives me a value of (for maximum 90%)
R_DT = (500+1.25)·(0.9·(1.4-0.6)+0.6) ≈ 650 kΩ
But the controller won't start at all with this value, so I used the same value as in the MIT manual. But this resistor is calculated with a RT resistor of 6.8 MΩ, which doesn't make sense according to figure 5 in the datasheet and given a minimum frequency of 20 kHz.
The divider resistors R1 and R2 are calculated from the maximum input bias current, which TI recommends (see page 8), to be such that the current through them is 1000 times the input bias current of the error amplifier (0.5 μA), which comes out at approximately the values in the circuit.
I hope I can get some advice on the design and understand how it functions better so I can get it to work. Explanations of the design in the MIT manual would help. Any constructive suggestions are appreciated.
Note: The MOSFET is not a IRF540N. I don't remember right now which one it is, same for the diode, but they are good for the job.
Here are some of the waveforms I get when I turn on the power supply at around the third division, and turns it off at around the second last division. The yellow signal is the controller output (MCP1406 input) and the green is the gate driver output. The purple is the COMP signal and the blue is the SCP pin. The SCP capacitor in this case is 15 μF to delay the SCP activation, which you can see happens when it reaches 1 V, and then for some reason discharges, and without activating the output again.
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I figured some things out and was able to make it work.
The current boost circuit is shown at the very bottom of this answer.
I wanted to optimize and understand how to design it according to how I wanted it to behave. However, this seems to be pretty complicated. I modeled the converter by estimating the open-loop transfer function of the converter. The block diagram of the converter can be depicted as in the following diagram (see page 76 of Power Electronics - A First Course by Ned Mohan)
The feedback gain is simply 1/400, and the PWM is equivalent to a gain block of gain 1/(1.4-0.6) (see section 7.3 of Fundamentals of Power Electronics by Erickson and Maksimovic). The power stage plus output filter transfer function is tricky, but Ned Mohan gives the following equation on page 81
I then tried to design a type III compensator/regulator/controller, and although I've done it before with a simple buck converter, it seems that there is no good method for designing it with this type of high step-up boost converter. So I used the simple integrator which gives the transfer function of the controller as (neglecting the negative sign) (see the figure of the compensator network from the datasheet given below) \begin{equation} G_C(s) = \frac{Z_2}{Z_1} = \frac{R_2 + \frac{1}{s C_2}}{R_6} = \frac{R_2 C_2 s + 1}{R_6 C_2 s} \end{equation} This allows me to just iterate the few component values based on my knowledge of how they should affect the circuit approximately, and the optimize the circuit in that way.
Using the margin function in MATLAB I could plot the open-loop transfer function \begin{equation} G_{OL}(s) = G_{C}(s)*G_{PWM}(s)*G_{PS}(s)*k_{FB} \end{equation}
How I designed the network was then based in iteration and nothing solid, accept for stability criterions for phase and gain margin. The frequency response comes out as in the figure, with the blue curve being the open-loop response. I modeled it with a duty cycle of 70%.
Below are two oscilliscope screenshots of what I get for start-up and steady-state. Green is on the COMP pin, blue is feedback, red is output, and yellow is MOSFET gate. Initially I had to increase the C5 capacitance so it didn't go into SCP mode, due to the slow start-up. I don't know why it has a small signal at the gate just after the long one in steady state. It is supposed to run at 25 kHz with 400 V output, so all that seems fine.
I would like to get suggestions to how I can optimize it, and how to understand it better, maybe make it faster without stability issues, and understand the small gate signal, is the model even accurate or is it just pure guess-work anyway. Pointing out things I have not considered is also greatly appreciated.
