Envelope detector for audio compressor

Question

I found the envelope detection part of an analog audio dynamic range compression circuit here, and I'm trying to figure out the purpose of:

• The second series diode
• The 100k feedback path from the 2nd op amp

My guess after poking around on the internet is that it might be something related to preventing the opamp going into an open loop situation in the negative waveform cycles, but I'm not entirely sure. The output is identical in LTSpice in response to 1k sine input with these components removed. The only text relating to this part of the circuit on the website states

To get this signal I simply needed to create an RMS voltage of the audio. This is a changing DC voltage that represents the AC amplitude of the audio. This is implemented with a specialized version of an AC to DC converter, which is done with rectifying diodes and a filtering capacitor. I used an active half-wave rectifier and an active lossy peak detector.

Circuit elements U2, D2, and D1 make the half-wave rectifier, which only passes positive voltages of the audio. The capacitor C3 holds the most positive voltage passed, but this voltage reduces as current drains through R17 slowly. The output voltage Vrmsp is the unfiltered RMS voltage that becomes the control signal.

The resistor R17 determines the rate at which the signal approaches zero following a peak. This resistor became a potentiometer to ground to act as the ‘release’ control, eliminating the need for a separate ‘release’ circuit element.

Answer 1

It's an odd circuit, economical in parts and fairly ingenious.

It's instructive to look at the things that an audio compressor needs to do in the sidechain before looking at it.

When the VCA has a log response (which is the case for THATS devices) the sidechain needs to do several things:

1. rectify the signal (sometimes you see a crude diode/CR circuit, sometimes a precision half/full wave rectifier) - and low pass filter with a suitable time constant - to get an almost-DC "envelope" signal from the input.
2. lin/log conversion to scale for the VCA
3. have some means of setting attack and release times. This is generally a CR network with diode/resistor combinations changing the attack/release.

The end result is that the VCA is controlled with a voltage which is based on the envelope of the input, but which will take (attack time) to rise to a peak when a loud signal comes in, and continue to do so for (release time) after the loud signal falls below the threshold (if positive voltage gives more attenuation - which may not be true, and many VCAs have inputs of both polarities - so you need to adjust your expectation and your design, accordingly).

Add to this things like hard knee/soft knee, feedback/feedforward topologies and so on, and you can see that things can get quite complex. This is why you usually see more happening in the sidechain than the direct signal path.

So, based on this, let's try to figure out the intention this design.

(EDIT - the schema is not so well drawn, I had to reassess this part. Think of R17/C3 as being on the input of U2 and it is clearer.)

R17 is important - this is the 0V ref for the circuit. U2 is non-inverting, when the input is positive, U2 out will be about 1.4V above the input and both diodes are forward biassed. So it will catch positive peaks. Attack time is fairly quick, basically set by how fast U2 can charge C3 via the diodes.

The voltage into U5 is the voltage across D1 which is being used (I think) as a log converter here.

When the input goes negative or less than the "remembered" peak stored on C3, C3/R17 will discharge with a time constant of about 200ms, which is a typical compressor slow release.

By the way - simulating this with constant sine waves won't tell you that much. To test a compressor properly you need to generate pulses of tone that change amplitude - eg 100ms 1kHz at -10dB, followed by 400ms at 0dB (this is just an example). Then you can evaluate the way your circuit handles changes in level and reduces gain (or not).

If you want to see examples of how this is done in a clearer way, I recommend the datasheet of the excellent (but obsolete, though I have a few) SSM2120 which included two log VCAs, but also two matched log rectifiers. There is much to be learned from the examples in those documents.