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Question

Can a simple NPN BJT transistor prevent a debug UART from backfeeding the MCU on the target PCB?

Problem

UARTs and associated USB-to-UART dongles (such as an FTDI branded one) are commonly used to debug microcontrollers on PCBs. The problem is that the TX line from the FTDI device to the microcontroller is driven high when IDLE by the FTDI device. This can prevent you from being able to reset the MCU by power cycling the board, as when you remove power to VCC, the +3.3V on the TX line backfeeds through the MCU internal ESD diodes to VCC, and keeps the voltage rail propped up. Series resistors work o.k. to prevent damage caused by this, but are not entirely suitable for making sure the VCC net drops right down to near 0V, as the power draw from the MCU drops significantly as it starts to turn off (e.g. through "brown out detection), meaning the MCU hovers in a weird state, or even worse, gets stuck repeatedly trying to turn on!

Potential Solution

Would a NPN BJT as shown in the image below fix this problem? I'll test this out on breadboard when I get the chance, but thought it could be good to ask here also! At least it might start some interesting conversation or discussion around other solutions to this.

I think the 0.7V drop from base to emitter will be o.k., this will just mean that the MCU sees about 2.6V as HIGH rather than 3.3V. I initially designed this using a MOSFET, but the equivalent gate-source threshold voltage is usually much larger than the base-emitter drop of 0.7V, meaning the logic HIGH could be even less than 2.6V and start causing problems.

enter image description here

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  • \$\begingroup\$ Consider looking at something like the commonly used level shifter circuit for I2C. \$\endgroup\$
    – brhans
    Mar 9, 2022 at 13:39
  • \$\begingroup\$ Maybe an optoisolator? \$\endgroup\$
    – spuck
    Mar 10, 2022 at 0:07

5 Answers 5

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The basic idea is OK. But the details are wrong. With 3.3 V at the base of the transistor, the transistor will be in a weird state. You could think of it more like two diodes at that point with minimal transistor action going on. The base-emitter junction would be like a pullup diode for MCU_UART_RX and the base collector junction would be like a pullup diode for FTDI_TX.

I think FTDI_TX would have a hard time driving the collector low with the base connected to 3.3V. MAYBE a base resistor could salvage the situation but I still don't like it and don't trust it.

What you probably want is a high-side PMOS switch. This could have its gate driven by an NMOS whose gate is tied to 3.3V. If you have room for two SOT-23 packages, this should work fine. You might be able to find the PMOS and NMOS together in a single package to save space if space is too tight for SOT-23's.

schematic

simulate this circuit – Schematic created using CircuitLab

OR you could use an analog bus switch with the Ioff feature. These provide isolation when powered off. I will let you use a search engine to find more about that option.

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    \$\begingroup\$ If you choose to use the buffer (which in some ways is the easiest solution, but slightly less interesting) you can look at part number SN74LVC1G34. It is a simple buffer. But because of the "Ioff" feature, it will present high impedance on all inputs when it is not powered on. It will not back-feed through MCU_UART_RX. \$\endgroup\$
    – user57037
    Mar 9, 2022 at 17:37
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No, that won't work.

Whether or not the FTDI_TX is even connected, when the 3.3V MCU supply is on, it will always keep the emitter at high level, making data transmission impossible.

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  • \$\begingroup\$ Duoh!...good point! Emitter is never more than 0.7 less than base, no matter what you are going with the transistor, it's essentially a diode from B to E. \$\endgroup\$
    – gbmhunter
    Mar 9, 2022 at 8:39
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A hacky but functional alternative is to have a series diode, combined with a pull-up on the MCU side.

schematic

simulate this circuit – Schematic created using CircuitLab

When a high level is transmitted by FTDI, the pull-up pulls the RX signal high. When a low level is transmitted, the diode pulls it low. Due to the drop voltage of the diode, the noise margin at the MCU is reduced by about 0.3 V.

Due to the reduced noise margin, I wouldn't recommend this for primary communication buses. It may however be an acceptable solution for a debug port that is only used with short cables.

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  • \$\begingroup\$ that was actually the solution i also thought about. Not super elegant, but probably works. \$\endgroup\$
    – Sascha
    Mar 9, 2022 at 18:59
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    \$\begingroup\$ I like the simplicity! One thing to be careful of is the fact the MCU's RX is not driven high with a strong drive anymore but only pulled up, and this will round out the edges of the digital signal depending on the capacitance. Assuming 10pF of capacitance (pin capacitance plus the tracks on the PCB) combined with a 100kΩ pull-up, gives a time constant of 1us (t = RC). This is approx 1/10 of a bit period when running at the common UART 115200 baud rate. This will probably be o.k., but potentially reducing the pull-up to 10kΩ (time constant now 1/100th of bit period) would be a good idea. \$\endgroup\$
    – gbmhunter
    Mar 9, 2022 at 23:19
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    \$\begingroup\$ @gbmhunter True. The diode capacitance acts in favor of preserving edges, so it will also depend a bit on the ratio between input capacitance and diode capacitance. \$\endgroup\$
    – jpa
    Mar 10, 2022 at 6:32
  • \$\begingroup\$ @jpa good point r.e. the diode capacitance. Reminds me of "speed-up capacitors" added in parallel across resistors in some circuit designs. \$\endgroup\$
    – gbmhunter
    Mar 11, 2022 at 21:11
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There are some great answers to this question. I have now done some more reading and wanted to provide a full example of one of the options suggested as a comment. As @Justme mentioned, the BJT method won't work as the base will hold up the emitter and prevent the TX signal from getting through. As @brhans and @mckeith mentioned, a logic IC with the "Ioff"/"power off protection" feature is one solution, as shown below:

enter image description here

Note that these ICs have a slightly different CMOS totem-pole driver configuration which prevent the diode going from the I/O line to Vcc forming (which is sometimes used as or called the "ESD diode"). Instead of connecting the substrate of the P-channel MOSFET directly to the source (Vcc), they add an additional blocking diode which enables the Ioff functionality.

enter image description here

More on this can be found at https://www.ti.com/lit/an/scea026/scea026.pdf.

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I‘d like to sketch a somewhat different method to solving this problem, although it might not apply due to design requirements.

All those cheap little FTDI breakout boards have a jumper to choose if the board should pull up the target to 3.3V or 5V. However, there is a third option: leave the jumper disconnected and connect the target’s VCC to the VCC pin of the breakout board.

Thus you need 4 wires (RX, TX, VCC and GND) to connect the FTDI to the target, but you not only allow for different voltage options, but this also would solve your problem of backfeeding through protection diodes.

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