This image shows a great representation of what happens to the return current when you switch layers:
When the source current goes through a VIA and there is no longer a low inductance path for the return current to follow, it will follow the source current along the bottom of the plane to the VIA, and transfer to the top of that same plane along plane's side edge (due to the skin effect).
From there, it must find a path to couple to the new reference plane for the top signal layer. When the return current reaches the top of the bottom plane, it will expand radially until it finds a low inductance path to couple to the new reference plane.
In your case, your top and bottom reference planes are a different potential and must be coupled capacitively. Fortunately, this is already the case typically as good capacitive coupling is also a goal for proper power delivery throughout the PCB. There is also embedded capacitance throughout the PCB between the two planes (they form a large capacitor). As the return current expands outward, it will couple through the embedded capacitance, and nearby capacitors. For this reason, it is recommended to place stitching capacitors near the transition VIA to provide a nearby capacitive path for the return current. However, a VIA connection is never perfect and will have some inductance that makes it ineffective at higher frequencies. Because of this, it is not a perfect solution, though placing several stitching capacitors should improve the issue.
In the case where the reference planes are both the same potential (usually both GND, or the same power plane), VIAs can be used to provide a direct copper path. These should be placed near the transition VIA, and in general two planes of the same net should have an array of stitching VIAs throughout.
Once the current gets to the top reference plane, it must then get to the topside of that plane. To do this, it must travel along the board edge again, in which case it will do so along the edge of a VIA (stitching VIAs, signal transition VIA, etc.)
In general, neither solution is perfect. Any layer transition will represent notable change in characteristic impedance, resulting in emissions of HF energy. This can cause issues in your own circuit (poor signal quality in the relevant signal, coupling to nearby signals), as well as nearby signals (failing radiated emissions compliance tests). You need to consider how much HF energy your signal has, and if this must be accounted for.
I'd consider the following:
- Can some of that HF content be removed? Slower slew rate, slower data rate, filtering, etc.
- Can it be routed on a single layer, with a consistent transmission line?
- If it needs to change layers, can it be done with the same reference plane (Such as a SGS - SPS 6 layer board, transitioning about the GND plane)
- If it needs to change layers, can it be done with the same reference plane (Such as a SGx - xGS 6 layer board), using stitching VIAs?
- If it needs to change layers, ensure there are stitching capacitors nearby with low inductance connections.