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I use a 4-Layer PCB with the following layer stack from top to bottom: SIG-GND-PWR-SIG.

Now, as long as I route everything on the top signal layer, the HF signals have the GND reference plane underneath it for the return currents (and the fields are contained), but what happen with the return currents and especially with the fields (that contain the energy) when I switch with a trace from the top to the bottom layer? Since the currents will follow the trace path as good as possible they will probably search for the nearest via to the GND plane and follow there the trace path? But there is the PWR plane in between, so the fields do not really couple to the GND plane. Will the return currents just spread all over the GND plane?

So what happen with the return currents and the fields when I route signals at the bottom layer in a 4-Layer stack?

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    \$\begingroup\$ Oh no. Henry Ott's website was taken down. I guess because it's been a few years since he retired. Look for his articles about changing reference planes elsewhere. \$\endgroup\$
    – DKNguyen
    Mar 17, 2022 at 13:27
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    \$\begingroup\$ Here is a remnant: frontdoor.biz/HowToPCB/HowToPCB-extra/PCBStackups(Ott).pdf \$\endgroup\$
    – DKNguyen
    Mar 17, 2022 at 13:28
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    \$\begingroup\$ @DKNguyen - Hi, "I guess because it's been a few years since he retired." FYI I learned recently that Henry Ott died last year :-( See here. \$\endgroup\$
    – SamGibson ♦
    Mar 17, 2022 at 14:12
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    \$\begingroup\$ @DKNguyen - Exactly :-( Thankfully his book is available for future generations of engineers. And, at least for the moment, some (most?) of his website is available at the Internet Archive here. \$\endgroup\$
    – SamGibson ♦
    Mar 17, 2022 at 14:23
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    \$\begingroup\$ @SamGibson Thanks for the Wayback link, I too was dismayed when his site was taken down. \$\endgroup\$
    – Aaron
    Mar 17, 2022 at 14:31

2 Answers 2

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If you have good decoupling between the power plane and the GND plane, the impedance between the two will be very low at high frequencies.

Your HF signal wont know the difference between the GND and the power plane.

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This image shows a great representation of what happens to the return current when you switch layers:

https://www.researchgate.net/profile/Jingook-Kim/publication/4037137/figure/fig1/AS:669982799183877@1536747755200/Signal-Current-Path-and-Return-Current-Path-of-4-layer-PCB-Return-Current-Path-has-the.ppm

When the source current goes through a VIA and there is no longer a low inductance path for the return current to follow, it will follow the source current along the bottom of the plane to the VIA, and transfer to the top of that same plane along plane's side edge (due to the skin effect).

From there, it must find a path to couple to the new reference plane for the top signal layer. When the return current reaches the top of the bottom plane, it will expand radially until it finds a low inductance path to couple to the new reference plane.

In your case, your top and bottom reference planes are a different potential and must be coupled capacitively. Fortunately, this is already the case typically as good capacitive coupling is also a goal for proper power delivery throughout the PCB. There is also embedded capacitance throughout the PCB between the two planes (they form a large capacitor). As the return current expands outward, it will couple through the embedded capacitance, and nearby capacitors. For this reason, it is recommended to place stitching capacitors near the transition VIA to provide a nearby capacitive path for the return current. However, a VIA connection is never perfect and will have some inductance that makes it ineffective at higher frequencies. Because of this, it is not a perfect solution, though placing several stitching capacitors should improve the issue.

In the case where the reference planes are both the same potential (usually both GND, or the same power plane), VIAs can be used to provide a direct copper path. These should be placed near the transition VIA, and in general two planes of the same net should have an array of stitching VIAs throughout.

Once the current gets to the top reference plane, it must then get to the topside of that plane. To do this, it must travel along the board edge again, in which case it will do so along the edge of a VIA (stitching VIAs, signal transition VIA, etc.)

In general, neither solution is perfect. Any layer transition will represent notable change in characteristic impedance, resulting in emissions of HF energy. This can cause issues in your own circuit (poor signal quality in the relevant signal, coupling to nearby signals), as well as nearby signals (failing radiated emissions compliance tests). You need to consider how much HF energy your signal has, and if this must be accounted for.

I'd consider the following:

  1. Can some of that HF content be removed? Slower slew rate, slower data rate, filtering, etc.
  2. Can it be routed on a single layer, with a consistent transmission line?
  3. If it needs to change layers, can it be done with the same reference plane (Such as a SGS - SPS 6 layer board, transitioning about the GND plane)
  4. If it needs to change layers, can it be done with the same reference plane (Such as a SGx - xGS 6 layer board), using stitching VIAs?
  5. If it needs to change layers, ensure there are stitching capacitors nearby with low inductance connections.
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