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I'm working on two little pcbs to emulate a USB-C usb A cable by FFC. In the future I would like this designs on other PCB avoiding USB wires and connectors. For this, I want to test it with the next design: with other female USB A cable and checking if the FFC and minipcbs works fine. My question is: Would you add any usb protection to the female USB connector? Or for this job is this protection not necessary?

Thank you so much.

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USB A schematic mini board. USB A schematic mini board

USB C schematic mini board. USB C schematic mini board

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I would probably add a TVS diode array to the superspeed lines. The good thing about these is their pin layout often adheres to a "flow through" design, where the device goes directly over the superspeed lines without breaking the transmission line, meaning when prototyping, you have the option to test them with and without.

Something like a TPD4EUSB30DQAR. Datasheet

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Or Semtech's RClamp3346P, which includes protection for the USB 2.0 lines. Datasheet

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If you do use these, consider removing a GND cut-out underneath any SMD components to reduce parasitic capacitance.

One final comment - I would recommend adding some stitching vias near to your signal vias in the middle of each board, as the reference plane changes here (especially if these traces are superspeed)

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  • \$\begingroup\$ thank you for your answer. Only two questions, this female usb-a will be connect to male-male usb-a, connected to a device, would you add these protections knowing this? The second question, the designs are 4-layer design, with 2 and 3 layer as GND planes. Would you add the stitching vias anyway? \$\endgroup\$
    – Juanma
    Mar 21, 2022 at 8:45
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    \$\begingroup\$ I would include it in the design. Assuming you're going to prototype this, and are going to make more than one for testing purposes, you simply assemble one board with the device on and another with the device off. Other than cost and component count, I see no significant disadvantage to using them. Regarding the planes, I would definitely stitch them, close to the signal vias. This will help to minimise your return path. ti.com/lit/an/slla414/slla414.pdf See section 3, figure 10. \$\endgroup\$
    – raaymaan
    Mar 21, 2022 at 10:53
  • \$\begingroup\$ Thank you so much! \$\endgroup\$
    – Juanma
    Mar 22, 2022 at 8:18

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