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enter image description here

In the attached schematic, there are two branches. The branch on the left has a pmos + nmos transistor. The branch on the right has two nmos transistors. The sizes of the devices were selected such that the current through each branch is almost identical.

Each branch sets the reference current for a current mirror, where a MOSFET is used instead of a resistor to set the bias current (i.e. M3 and M4 can be thought of as bias resistors).

My question is this - if you can use two nmos transistors to achieve the same result as a nmos+pmos configuration, why choose the option that uses the pmos? The textbook I'm reading through uses the example of pmos+nmos, without really justifying why. It's a non intuitive answer to me. I suppose more generally, if it's possible to arrange a circuit configuration using only nmos transistors, why/would you ever choose to design in a way using pmos?

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    \$\begingroup\$ why/would you ever choose to design in a way using pmos? Why not? I think you're claiming that there are presumed disadvantages - it'd help to list them, so that they could be addressed. At the moment, it's hard to answer your question. \$\endgroup\$ Commented Mar 29, 2022 at 21:01
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    \$\begingroup\$ The problem with your question is we don't know what the circuit is supposed to do so what we don't know what the considerations are. To me, those circuits look like they do nothing useful therefore there are no considerations. But many applications falls under the answer here: electronics.stackexchange.com/questions/455693/… \$\endgroup\$
    – DKNguyen
    Commented Mar 29, 2022 at 21:19
  • \$\begingroup\$ I'd start by analyzing their current stability over temperature and process variations. Or if you're taking a class, ask the prof -- it'll spark discussion, and most profs like that. \$\endgroup\$
    – TimWescott
    Commented Mar 29, 2022 at 22:12

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