I am trying to simulate the frequency response of a buck converter's control loop. The vendor's simulation tool is pretty limited and can only include one output capacitor. Therefore, I am trying to calculate the effective capacitance and effective ESR of several parallel capacitors on the output of my converter such that they can be represented by a single component in the simulation circuit.
To simplify things, lets consider a circuit with two parallel capacitors. Taking into account each capacitor's ESR (but not ESL or leakage current), we have the following equivalent circuit.
simulate this circuit – Schematic created using CircuitLab
I am using the ESR and effective capacitance of two real tantalum capacitors at the switching frequency of my buck converter (400kHz). If we treat each capacitor as a complex impedance, we can pretty easily calculate the effective parallel impedance of these parts.
$$ Z_1 = ESR_1 - \frac{j}{2 \pi f C_1} = 89m - \frac{j}{2 * \pi * 400k * 22 \mu} $$
$$ Z_2 = ESR_2 - \frac{j}{2 \pi f C_2} = 22m - \frac{j}{2 * \pi * 400k * 220 \mu} $$
$$ Z_{effective} = \frac{1}{1 / Z_1 + 1 / Z_2} = 0.017679406121700082-0.001866038471357612j $$
Now to represent this is a single capacitor with ESR, we have to extract the effective ESR and effective capacitance from this impedance.
$$ ESR_{effective} = real(Z_{effective}) = 0.017679406121700082 \approx 17.68m \Omega $$
$$ C_{effective} = \frac{-1}{2 * \pi * 400k * imag(Z_{effective})} \approx 213.2 \mu F $$
Now I assume I've got something wrong by this point because this is a very confusing result. In this case, the effective capacitance of two parallel capacitors is not the sum of discrete capacitance. Indeed, it is less than the largest discrete capacitance.
Can anyone help point out the error in my logic or math? How would you represent several parallel caps as a single component for the purposes of simulation?