# When taking into account ESR, the effective capacitance of parallel capacitors is not the sum of discrete capacitance?

I am trying to simulate the frequency response of a buck converter's control loop. The vendor's simulation tool is pretty limited and can only include one output capacitor. Therefore, I am trying to calculate the effective capacitance and effective ESR of several parallel capacitors on the output of my converter such that they can be represented by a single component in the simulation circuit.

To simplify things, lets consider a circuit with two parallel capacitors. Taking into account each capacitor's ESR (but not ESL or leakage current), we have the following equivalent circuit. simulate this circuit – Schematic created using CircuitLab

I am using the ESR and effective capacitance of two real tantalum capacitors at the switching frequency of my buck converter (400kHz). If we treat each capacitor as a complex impedance, we can pretty easily calculate the effective parallel impedance of these parts.

$$Z_1 = ESR_1 - \frac{j}{2 \pi f C_1} = 89m - \frac{j}{2 * \pi * 400k * 22 \mu}$$

$$Z_2 = ESR_2 - \frac{j}{2 \pi f C_2} = 22m - \frac{j}{2 * \pi * 400k * 220 \mu}$$

$$Z_{effective} = \frac{1}{1 / Z_1 + 1 / Z_2} = 0.017679406121700082-0.001866038471357612j$$

Now to represent this is a single capacitor with ESR, we have to extract the effective ESR and effective capacitance from this impedance.

$$ESR_{effective} = real(Z_{effective}) = 0.017679406121700082 \approx 17.68m \Omega$$

$$C_{effective} = \frac{-1}{2 * \pi * 400k * imag(Z_{effective})} \approx 213.2 \mu F$$

Now I assume I've got something wrong by this point because this is a very confusing result. In this case, the effective capacitance of two parallel capacitors is not the sum of discrete capacitance. Indeed, it is less than the largest discrete capacitance.

Can anyone help point out the error in my logic or math? How would you represent several parallel caps as a single component for the purposes of simulation?

• This should be true only if the capacitors are exactly the same... Don't forget also the presence of wire connexion (series inductance) ... if there are not the "same" (length and geometry). Mar 30, 2022 at 15:45
• Abandon that simulator and use what regular EEs use. You can add whatever components you need. Don't hamper yourself with bad tools because... design is important. Mar 30, 2022 at 15:49

Your calculations are correct. It is a little difficult to find an intuitive explanation, but it is helped by considering some extremes.

1. At low frequencies (where the ESR component of Z is negligible), then the effective capacitance is 22u+220u = 242u.

2. Imagine that ESR of the 22 uF was 0. At very high frequencies (where the j component of the 220 uF is negligible compared to its ESR), then essentially all the imaginary component of current flows only in the 22 uF (although there is 89 mΩ in parallel with it). Therefore the capacitive component of the Z is about 22 uF -- basically the 220 uF (+ ESR) just becomes a R in parallel with the system. If ESR of the 22 uF is close to 0 (i.e. less than C2/C1*R2), then at low frequencies, you see C1+C2, but at high frequencies, you see C1 only. Conversely, if the ESR of C1 is large, then at high frequencies, it doesn't carry the current, and you are left with C2 (the larger cap), albeit with an ESR.

So, extracting the C component only can tend to give unexpected results when the ESR of the smaller cap is smaller than expected -- basically a larger fraction of current flows in that (smaller) cap, so that dominates the calculation. Of course the overall impedance is still lower by putting two caps in parallel, it is just not all capacitive impedance.

Those values do appear to work. If you simulate a voltage divider made from the calculated values and the parallel combination, and subtract its output from the output of a resistive voltage divider, you get very close to a null (I fudged your approximations a little bit, you could try calculating them to a higher resolution and it should be closer to null), which should mean the values in each leg of the divider are equivalent. • So if the math and the logic are correct, doesn't it seem problematic that adding an additional capacitor in parallel with the 220uF doesn't increase the total capacitance? One would expect approximately 240uF of total capacitance. Wouldn't this make it very hard to get the high output capacitance required to avoid voltage undershoot with many buck converters Mar 30, 2022 at 17:24
• @JoshuaE Not necessarily. Remember that, supposedly, the objective is to to target different frequencies with different capacitors. Not to target the same frequency with both capacitors. ESR is also not nearly as important as ESL in this respect which you have neglected. But then there's the whole resonance peaking issue. It does seem unusual though as a whole that capacitance is decreased but if the math is correct I guess it is what it is. Mar 30, 2022 at 17:43
• Clearly the IMPEDANCE is reduced with more caps (incl. their ESR) in parallel, but when taking ESR effects into account (i.e. when the ESR is >> the j component of the Z), the imaginary component of the Z doesn't necessarily track as you would expect . Imagine the 22 uF has 1 mΩ ESR. At v. high freqs where the capacitive component of the impedance is negligible, then the current will predominantly flow in the 1 mΩ, bypassing the 220 uF (with 22 mΩ) completely. Therefore a measurement of Z will mostly show only that path (22 uF + 1 mΩ) -- which will look like 22 uF capacitive component. Mar 31, 2022 at 16:01