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For a number of reasons I'm designing a 4-layer board with a fine-pitch BGA (400um). For some manufacturability reasons (the board must be mounted behind some other device) the bottom side of the board cannot be used so the tried and proven technique of putting the decoupling caps on the backside is out of question.

The best option I could come up with is to use microvias for connecting the ball pads to the power polygon running below the BGA, then placing the whole array of decoupling capacitors on the top side and connecting them with "regular" vias to the power and ground polygons/planes.

So far so good, but I'm afraid the inductance added by the vias and the current loop required to go below the BGA may negatively impact the chip performance.

For reference this chip operates at RF frequencies (few tens of GHz), the current draw is quite small and has a low-speed serial interface to control it.

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    \$\begingroup\$ Kind of a dilemma for such a high speed part. There are PCB processes that can embed capacitors in the PCB itself, maybe that's a plan B option if your decoupling scheme doesn't work out. \$\endgroup\$
    – John D
    Mar 31, 2022 at 14:44
  • \$\begingroup\$ Are we talking about a 1000-ball BGA or a 16-ball BGA? How sensitive is it to noise(is it a power amplifier or a receiver front end)? \$\endgroup\$
    – The Photon
    Mar 31, 2022 at 15:10
  • \$\begingroup\$ It's a 99-ball BGA, ~42 of them are tied to ground and ~14 of them are power pins. The whole thing is really noise-sensitive as it is part of a receiver frontend. \$\endgroup\$ Mar 31, 2022 at 16:16
  • \$\begingroup\$ The correct answer is to inquire with the IC manufacturer for recommendations. They may even have example layouts for you to copy. Their demoboards are often a good place to start (if it exists) \$\endgroup\$
    – Kyle B
    Mar 31, 2022 at 17:29

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