I'm trying to make a video timing generator on an FPGA. I'm finding a difference online in the order this occurs:
Here's one version:
and here's another:
Where this seems inconsistent: If scanning from left to right, top to bottom, does the vertical front porch occur immediately after the horizontal back porch or the horizontal sync? Likewise, after the vertical back porch has ended, would the next pixel be active video, or part of the horizontal back porch?
These images are deceiving: they are drawn flat, but topologically they are depicting a surface of a torus (a donut with a hole in the middle).
The right edge connects with the left edge. The top edge connects with the bottom edge. The rectangle you used to view the flattened surface of this torus can be located arbitarily - only its orientation is fixed.
So the images are just two different "flattenings" or projections of the same torus.
Another way to view this is to extend the images by repeating them infinitely horizontally and vertically. Then you can move the viewport anywhere you want and it's still showing the surface of the same torus, just at a different horizontal and vertical offset.
I've extended the first image in your question in a torus-like fashion, and outlined the second image you posted. As long as you can do such a transformation, both are equivalent!
The difference seems to be simply that the (imaginary, externally non-observable) periods of time for the horizontal and vertical porches are counted differently. In the first image, the period between HSYNC and the first active image pixel (3-4) is considered part of the vertical back porch:
while in the second image that same (equal-length) time period from hsync to first active image pixel (3-4) is considered part of the first line outside of the back porch:
Essentially, the vertical back porch starts, and ends, earlier in the second image. However, the disagreement occurs outside of the active area and sync signals anyway, so there is no real timing discrepancy.
The two images still have an unclear discrepancy with when the VSYNC signal starts and ends, since they don't have enough detail to show relative timing between HSYNC and VSYNC. The ambiguity is whether VSYNC starts with the horizontal back porch, through the end of the vertical back porch, or if it starts at the end of the horizontal back porch and ends at the end of the horizontal sync. On the diagrams, this can be seen as a discrepancy of whether (1) aligns with (3) or with (4).
A few references I looked at (including ones that reproduce diagrams from monitor manuals) also don't show this relationship, and display timings are generally a mess of different competing standards with vague similarities and subtle differences.
I would suspect that because these drive separate sync and counter circuits, that exact relationship doesn't matter as long as the general timings (line-to-line and column-to-column) match up.
