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I had a question in my electronics course homework pertaining to eliminating the bounce from a SPDT switch with a Schmitt trigger. The switch has two inputs with opposite polarity. I've looked online and seen some SPST switches that use a capacitor. (this was my initial design attempt before anything. Although, the opposite polarity case caused my design to fail after some simple analysis). I believe just a Schmitt trigger works fine here; however, out of pure interest, how can I improve this simple circuit from a practical standpoint? (I.e., what am I missing here since I am ignoring nonidealities, or anything else?)

I attached a schematic of my design, let me know if you need any more clarifications. Thank you.

Below the schematic is an image of what the expected bounce looks like from my textbook Microelectronic Circuits and Devices, 2nd ed. by Mark N Horenstein, published in 1996, Pearson Education Inc. The figure is P2.122 on page 101.

schematic

simulate this circuit – Schematic created using CircuitLab enter image description here

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  • \$\begingroup\$ Your circuit as shown will produce squarewave bursts at the output during switch bounces. As this is homework, I won't go much farther. If you search for switch debounce schematic, you will get lotsa examples. Going through them, you should see a pattern, a common approach, etc. Think about what switch bounce looks like as a signal voltage. Draw a scope trace of what you think the right side of SW1 looks like during switch action. \$\endgroup\$
    – AnalogKid
    Apr 3, 2022 at 21:59
  • \$\begingroup\$ @AnalogKid Say V1 and V2 are equal to V, If the Schmitt trigger has a trigger less than V, wouldn't it sustain the state since the bounces are a square wave from 0V to +V or -V past the switch moment? I.e., the polarity should stay the same because the square wave doesn't pass the opposite end's trigger, right? \$\endgroup\$ Apr 3, 2022 at 22:21
  • \$\begingroup\$ All that is a required is a spec for input V avail and output V required. But if that is the same as 0 and V+ then a simple button switch SPST-NO with a pullup R=1M and a small cap C=10nF across switch to hold for the bounce time < RC=T usually < 10 ms for small buttons. Then the contact bounce has a Sample and hole capacitor. ON to 0V is a common negative logic method inherited from TTL days for technical reasons. If you need different outputs, then any comparator or OA or logic chip will do. \$\endgroup\$ Apr 4, 2022 at 0:34

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The easiest way I know is to use a RS latch. You can do this with most any latch that has set and reset or cross coupled nand gates will also work. This shows cross coupled nand gates with a good explanation. It has a lot of nice scope pictures with explanations.

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  • \$\begingroup\$ GodJihyo, thanks for the repair. I lost power in the middle of the edit and had no idea of what was there. \$\endgroup\$
    – Gil
    Apr 4, 2022 at 21:42

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