I'm working on another design that has multiple channels for a few circuits with in a multisheet design in Altium Designer.

I have a top sheet that contains all my sub systems as sheet symbols. One of the sheet symbols is for motor control signals and sensors. This sheet contains two sheet symbols setup as multichannel sheets. When I compile the project I get the multiple top level document error. I have been working for about two hours trying to resolve this issue reading through the Altium wiki but I can't seem to figure out how to fix it. I am unsure whether or not I am allowed to have sub sheets with their own sub sheets, the example in the Altium wiki leads me to believe I can but so far I am unable to get the project to compile this way. Is there a way to formally set which schematic sheet is the top sheet for the project? I think that might be what I need to do but I can't seem to find the option within Altium or from googling around. Anyone here have any idea?


Figured out a workaroud: Made the sheet containing the channel sheets the top sheet by adding sheet symbols for the two other subsystems in the design.

  • \$\begingroup\$ Every schematic sheet has to be present somewhere in the project hierarchy, except the main sheet. What you did isn't clear, but if you didn't have sheet-symbols for some of your schematic pages, that was your problem. \$\endgroup\$ – Connor Wolf Apr 21 '13 at 5:39

Can you provide some screen-shots of the root pages?

This is extremely hard to debug without more information. One place to start is to look at which documents are showing up as the top-sheets in the project manager after compiling the project.

To answer your question as to whether you can have sub-sheets with further child-sheets, you absolutely can.

With regard to manually specifying the top-sheet, this wouldn't help in your situation, as the fact that the project compiler cannot determine the top-level document means that the compiler cannot determine the fully qualified path of one(or more) of your schematic documents. As such, it can't properly determine the schematic interconnectivity.
Forcing one page to be fully qualified doesn't necessarily mean that the other page's location will be resolvable.


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