Looking at this section of a TI PoE schematic, you can see wires looping onto themselves by MOSFETs, like Q3 and Q5 in the figure below:
What is the purpose of these wire loops near the MOSFETs?
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The mosfet package has many pins which are all tied to the same point. Take for example the SI4850, it has three pins for the source and four pins for drain. The designer decided to give each one of these pins a connection on the schematic.
Most schematic software CAD packages can assign multiple pins to one pad, so it isn't necessary to give each pad a pin assignment, but again it's up to the designer.