Reflected-wave switching from Wikipedia contains the following paragraph:

If, on the other hand, there is no termination at the end of the microstrip, and the pulse encounters an open circuit, it is reflected back towards its source. As this reflected wave travels back along the microstrip, its amplitude is added to that of the original pulse. As the reflected wave passes the receiver for a second time, this time from the opposite direction, it now has enough amplitude to be detected. This is what happens in a reflected-wave switching bus.


The bus has to be short enough, such that a pulse may travel twice the length of the backplane (one complete journey for the incident wave, and another for the reflected wave), and stabilize sufficiently to be read in a single bus cycle. The travel time can be calculated by dividing the round-trip length of the bus by the speed of propagation of the signal (which is roughly one half to two-thirds of c, the speed of light in vacuum).

Below is another place talking about the same thing (within the book PCI Express Technology Comprehensive Guide to Generations 1.x, 2.x, 3.0, by Mike Jackson and Ravi Budruk):

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I don't quite understand the reason behind the "round-trip" calculation: It seems that for the receiver to detect the signal, it is only necessary that the signal level is doubled by the reflection. Why does the receiver need to wait until the reflection travels back to the source and is absorbed?


1 Answer 1


For a point-to-point wire, one transmitter, one receiver, you are correct. A receiver at the far end will see the doubled-half-signal (correct signal) as soon as the incident wave reaches the far end. The reflection back to the transmitter is irrelevant to the receiver, as long as the transmitter termination correctly matches the transmission line and suppresses further reflections.

In your second example, they are talking about a bus, which serves receivers spread out along the line, some close to the transmitter. The furthest see the correct signal after one length delay. The nearest see half a signal almost at once, and then have to wait the rest of two length delays to see the full amplitude.

This could not be used with a clock signal, as taking a clock line to half amplitude and leaving it there would be a recipe for disaster. I can only assume that the PCI bus described uses this for data, that's not clocked in until a clean full-swing clock line strobes the input buffers, after the two length delays have elapsed.

The wikipedia article you link to starts with the line

Reflected-wave switching[1] is a signalling technique used in backplane computer buses such as PCI.

so it's exactly the same argument.

Normally, this method of driving a transmission line is only recommended for point-to-point data transmission. Even if the intermediate voltage levels of receivers closer to the transmitter are ignored until they've settled, those mid levels could lead to a large increase in power consumption by holding the input buffers in their active amplifying region for significant periods of time.

There are better methods for reducing power consumption these days (low swing like LVDS, serial comms like JESD204 and PCIExpress, all using point to point connections) so I would not be surprised if the early generation PCI was the only standard to use reflected wave on a bus.

  • \$\begingroup\$ Thanks for your reply, @Neil_UK. Regarding your remark on clock signal (i.e., clock line should not be using reflected-wave signaling), I searched the web. From PCI Bus demystified, page 74, note 1, it says that "This specification does not apply to CLK and RST# which are system outputs." But I am not sure if this is exactly what you were talking about regarding CLK signal. Thanks again! \$\endgroup\$
    – bruin
    Apr 10, 2022 at 0:40
  • 1
    \$\begingroup\$ @bruin If you make a clock signal wait for a while at mid-level, then you can get multiple clocks delivered to your receiver - with guaranteed bad results for the system. Coming out of reset half way is also a disaster waiting to happen. While this mode is frequently used on point-to-point connections, it's almost never used in the way that PCI use (or misuse) it. They must have wanted that power saving really badly to entertain all the bad things that happen when you use a bus like this. Nobody would use it like that today. \$\endgroup\$
    – Neil_UK
    Apr 10, 2022 at 14:04

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