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My input is an FM carrier of 80.00MHz. It is FM modulated with 625kbpsec data. The deviation from carrier is about +/-700kHz. The data never spends more than about 38us in a low state or high state i.e. it is scrambled. Carrier is frequency locked using a PIC and a PLL (ADF4111 from memory but this isn't too important other than to say the varactor that "centres" the frequency is fed from a much slower signal than even the lowest data might produce). Please ask if I've forgotten anything relevant.

The above are all givens.

I'm considering using FM quadrature detection - is this the best choice given that I can't alter the transmitter design (well maybe not this month anyway!!).

EDIT - March 21st - the answer below about counting the cycles stirred thoughts and it provoked me to consider using a high-speed Exclusive or gate as an alternative to the conventional mixer circuit within the heart of the quadrature detector. It would still require a resonant 90º phase shift circuit and simple amplitude limiting so, is this a better choice? Options

  1. Conventional Quadrature Detector
  2. Quad detector using an exclusive or gate
  3. Cycle counting techniques
  4. A PLL (I've added this but i can't see a decent way of doing it though somebody may)

If one of the above is the best technique, an answer that adequately justifies it gets the nod from me!

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  • \$\begingroup\$ PLL detectors are great. What's the problem with ways of doing it? \$\endgroup\$ – user207421 Mar 22 '13 at 22:52
  • \$\begingroup\$ @EJP I'm just unsure about it - would I feed 80MHz clock into it or use it like a Frequency-phase detector with a 90º phase shift circuit - how would I cope with frequency drift of the transmitter AND detect the modulation. \$\endgroup\$ – Andy aka Mar 22 '13 at 23:10
  • \$\begingroup\$ Well the transmitter has to have less frequency drift than would be caused by modulation by the least significant bit of the data. Otherwise it's impossible. \$\endgroup\$ – user207421 Jul 4 '14 at 1:51
  • \$\begingroup\$ So just to be clear: This is 2-FSK, right? You receive bits, and they are represented by the frequency being either +700 kHz or -700 kHz of the carrier. \$\endgroup\$ – Marcus Müller Apr 22 '18 at 8:17
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    \$\begingroup\$ @MarcusMüller In the end (5 years ago!) I used a quadrature detector and the quadrature mixer drove a varactor that kept the quad tank aligned with the carrier. That's what I did in the end but I'm not sure it provides the best SNR. \$\endgroup\$ – Andy aka Apr 22 '18 at 8:56
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So I've done some research since I have a similar problem and everything leads me to fully integrated quadrature demodulators like LT5517 with a good NCO if you need AFC. All digital systems with direct sampling might have even better noise performance especially if you use oversampling (source) but they have a detection delay, so your application should tolerate this delay if you want to use this method. Search for FPGA or DSP FM demodulators, there are plenty of articles. The best solution for data transmission I've found so far are specialized transceivers with interference resistance like AD9364, but those come in 144-LFBGA and cost $210 per chip. See this article for more info.

If you need a simple and decent demodulator, conventional quadrature demodulator has the best noise performance if you use high quality parts for it.

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It's a better choice for most purposes than a slope detector, a Foster-Seeley, or a ratio detector, but for this application you might be better off with a counting detector.

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    \$\begingroup\$ that made me think and get the calculator out. Counting @ F = 80.7MHz over 800ns (1 data period) gives 64.57 counts. At F = 79.3MHz gives 63.44 counts - not enough difference I think but it did give me hope of an alternative. Thanks \$\endgroup\$ – Andy aka Mar 19 '13 at 22:31
  • \$\begingroup\$ Oops - slight error in my analysis - double the counts to 129.14 and 126.88 - maybe still a little too close to the knuckle for best data reliability? \$\endgroup\$ – Andy aka Mar 19 '13 at 23:01
  • \$\begingroup\$ I'm not clear what it is you're asking here. \$\endgroup\$ – user207421 Mar 20 '13 at 1:19
  • \$\begingroup\$ A form of counting detector will differentiate data high and low by the number of carrier cycles in a given period of time. The period is determined by the max data rate i.e. 1.6usecs for 625kbpsec. The carrier will shift up to 80.7MHz and down to 79.3MHz when modulated. If i count the cycles I would expect to see in 1.6usec I get 127 and 129 and these are a little close to differentiate data high from data low. Maybe there are other methods? \$\endgroup\$ – Andy aka Mar 20 '13 at 8:38
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quadrature detector is the cheapest but phase comparator detectors (XOR are simple phase comparators but not as sensitive as AD8302s) are still the most linear.

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  • \$\begingroup\$ Linearity is irrelevant here. It's a data transmission system. \$\endgroup\$ – user207421 Jul 4 '14 at 1:49
  • \$\begingroup\$ yeah but modulation is data and phase information is very important running 700KHz deviation. I have run speeds on old motorola fsk quadrature chips and trust me they bend at 50KHz. Further, quadrature is filter dependent to make the data detection work. SO yeah linearity is very relevant at those deviations. Unless you can get crystal or ceramic filters that are 1.4MHz wide and dont even get me started with lossy and phase incoherent SAW filters. \$\endgroup\$ – jun magno Jul 4 '14 at 7:40

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