# SMPS bulk capacitor number

I am designing a SMPS and calculated the input capacitor to be around 47µF. The voltage rating needs to be >1000V.

What would be the difference (advantages/disadvantages) between using 2x500V in series aluminum electrolytic capacitors vs 3x350V of them in series ?

Thanks.

• Grading resistor requirements and voltage mis-distribution. Apr 13, 2022 at 9:10
• I'd avoid putting capacitors in series at all if possible, especially high leakage ones like alli electrolytics, as you have to balance the middle node(s) against unequal leakage and voltage sharing, so not a lot of difference between 2x and 3x. Is your SMPS input DC or bridge rectified AC? If the latter, there may be an interesting trick that you can apply. Apr 13, 2022 at 10:12
• And if it is difficult to find a 47µF/1kV cap, consider that 5pcs of 10µF/1kV in parallel are about the same capacitance and much lower ESR. Apr 13, 2022 at 12:04
• The input is 576VAC, rectified by a fullbridge, which result of 814VDC on the bulk capacitor. I would need a 1kV capacitor rating and 2x500V 47µF capacitors are more difficult to source than 3x350V 80 to 100µF ones. I would need balance resistors anyway with 2 capacitors in series. I'm interested in your trick @Neil_UK Apr 13, 2022 at 13:04
• 1kV film capacitors are difficult to find with high capacitance values and are more expensive Apr 13, 2022 at 13:19

There is a trick to using lower voltage electrolytics after a bridge rectifier that is illustrated in the PT4207 LED driver IC data sheet, schematic below, which ...

• uses two electrolytics in series to reduce their voltage requirements
• automatically balances their voltages without extra components
• improves the input power factor in several ways As the AC input rises to the peak as the capacitors charge, D3 puts C1 and C2 in series, which halves the capacitance seen by the mains input, reducing the large current spike at the crest of the input voltage that you would normally get with a capacitor filter, improving the power factor and harmonics.

After the crest as the voltage falls, D3 reverse biasses. The load continues to be supplied by the rectified mains input voltage. Normally a capacitor filter would supply the load immediately after the crest for the rest of the half cycle. Here while the input voltage is high, the load still draws input current, improving the power factor, and the capacitors don't supply the load, reducing their required value.

Once the mains voltage has dropped to below half of the crest voltage, D2 and D4 turn on, putting the capacitors in parallel to supply the load, doubling the capacitance.

As the capacitors are put in parallel, their voltages are equalised.

The SMPS load has to have sufficient voltage input range capability to handle the more than 2:1 swing in input voltage.

It's of course possible to extend this scheme to three capacitors in series, as long as the SMPS load can handle the more than 3:1 swing input voltage.

• Doesn't it also mean there is a high voltage swing because the capacitors only charge to half voltage? Might not be a problem if you are using a buck driver for LEDs anyway Apr 13, 2022 at 14:25
• Thank you for the explanation. Can you elaborate on "The SMPS load has to have sufficient voltage input range capability to handle the more than 2:1 swing in input voltage" ? The DC bus is 814VDC. Apr 14, 2022 at 8:50
• @Ultra67 If you want to use this clever trick of series/parallel caps to improve power factor and balance cap voltages, then your DC bus voltage will vary between the line peak of 814 V and less than half of that, maybe 300 V depending on the size of the caps. Modern 'universal input' 240/110V SMPS will easily handle this range, so it can be done. Bear in mind that even with the 'normal' bulk capacitor arrangement, your DC bus is not 814 V, it's 814 +/- quite a lot, maybe 600 V to 900 V, as your input voltage varies, and as the capacitors discharge through the half cycle. Apr 14, 2022 at 11:39
• I don't understand how can the voltage on the DC bus be higher than the rectified maximal input voltage, which is 576VAC * sqrt(2) = 814VDC. I agree that the bus voltage is of course varying with the input voltage. Apr 14, 2022 at 13:38
• @Ultra67 when the input AC voltage exceeds its nominal specification Apr 14, 2022 at 14:14