Is possible using SPI without SPI.h library with just using digitalWrite function?

Question

I was trying understanding how SPI protocol works. Basically they are just bunch of 1's and 0's serially for every its pins. I wonder if I can send and receive data from SPI slave device without using SPI.h library. The problem I need to consider is about SCK pin which it's about frequency and timing. How can I oscilate specify frequency in SCK pin?

Answer 1

I will try: You ask what is SPI? SPI (Serial Peripheral Interface) it is a synchronous communication bus standard. Data is synchronous to keep transfers short and fast. SPI communication is a master to slave configuration, where a single master can choose between one or more slaves via the CS chip Select function of the devices. Developed by Motorola around 1985. SPI, basically a synchronous shift register is simple to implementation and fast data transfer capability. Originally SPI was part of the hardware of the MC68HC05 and MC68HC11 families of microprocessors. This allowed inexpensive I/O expansion for use such as sensors, camera lens control, communications, and data storage on SD cards etc. This allowed simple logic ICs to be connected to the processor such as shift registers (serial in parallel out and parallel in serial out). Originally it was generally used for 8 bit devices which became a defector standard but it is not limited to such.

There are four connections required. They are MISO (Master In Slave Out), MOSI (Master Out Slave In) CLK, and CS\ Chip Select. The default size of the shift registers is 8 bits (the HC05 and HC11 are 8 bitters) but there is no limit, it can be as many or as few a bits the user wants to implement.

You have three pins on each device that are paralleled to all devices as a simple 3 wire bus. The forth wire CS or chip select is required on each of the slaves, the master has to select which slave it wants to communicate with. Therefore the master has to generate a CS for each part it communicates with. Communications is normally done but not required on a 1 to 1 basis.

It is bi direction in the fact that each time a bit is clocked out a bit is also clocked in. Exact interface is defined b the polarity (CPOL) and Phase CPHA) of the clocks relationship to the data. Most of the material talking about SPI defines it as a 4 wire bus, that is not exactly true as the chip selects and configuration change that number. You can use only serial in parallel out or parallel in serial out and need one less line as you are using it as a single direction device.

The primary connections are: First: SCLK: (Serial Clock) the signal which is always generated by the master. This clock synchronizes the data transfer. Its clock edge determines the actual data transfer.

Second: MISO: (Master In Serial Out) This is the input to the master. The MOSI of the slave connects to this pin transferring date to the master; the slave’s shiftregister data out goes to this pin.

Third: MOSI: (Master Out Serial In) This is the output from the master which would normally go to the data in pin on the shift register.

Fourth: CS/SS: (Chip Select/Slave Select) this pin selects the slave it wants to talk to. There is only one data out from the master, it connects to the data in of all of the appropriate slaves. Conversely the data in to the master connects to all of the data outs of the slaves. This will form a bus contention which the CS resolves. It selects normally only one device, the others ignore all of the signals. Each slave needs a chip select, the master can use eternal logic such as a 74C138 to generate multiple slave selects minimizing the pin retirement on the master.

CPOL: (Clock Polarity) This defines the initial clock state.

CPHA: (Clock Phase) This defines the relationship between data and clock transitions.

As originally defined by Motorola the clock transitions govern the shifting and sampling of data. SPI has four modes (0,1,2,3) that correspond to the four possible clocking modes.

Communications starts when the slave-select line is driven low (slave select is typically an active-low signal). Note the relationship between the slave-select, data, and clock lines depends on how the clock polarity (CPOL) and clock phase (CPHA) are configured.

Note: With non-inverted clock polarity (i.e., the clock is at logic low when slave select transitions to logic low):

Mode 0: Clock phase is configured such that data is sampled on the rising edge of the clock pulse and shifted out on the falling edge of the clock pulse. Data including settling time must be available before the rising edge of the clock.

Mode 1: Clock phase is configured such that data is sampled on the falling edge of the clock pulse and shifted out on the rising edge of the clock pulse.

Note: With the inverted clock polarity (i.e. the clock is at logic high when slave select transitions to logic low):

Mode 2: Clock phase is configured such that data is sampled on the falling edge of the clock pulse and shifted out on the rising edge of the clock pulse.

Note: that data must be available before the first falling edge of the clock.

Mode 3: Clock phase is configured such that data is sampled on the rising edge of the clock pulse and shifted out on the falling edge of the clock pulse.

Answer 2

Yes you can, every time the clock changes in a spi bus (usually on rising edge of clock) you find out what the data input pin is doing and then record that into a variable (with a shift function).

You can find the rising edge with interrupts or a for loop and oversample.