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I'm running some spice simulations in which I use power inductors. I found one on Aliexpress that seems suitable, but noticed that peak currents in the simulation exceed the rated saturation current by quite a lot.

So, I'm wondering: How can I model this inductor (and more specifically its saturation) as accurately as possible based on assumptions and the limited available specs?

I'd like to model the 330uH/25A variant.

The simulation is currently using just a standard inductor, with an inductance of 330uH and Rser of 14mΩ.

Here's the product page. Here's a picture and all the electrical information that's given:

enter image description here enter image description here

(The Chinese text in red says: 'silicon ferromagnetic powder core')

enter image description here

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  • \$\begingroup\$ What simulator are you using to model this saturation effect? \$\endgroup\$ Apr 24 at 10:08
  • \$\begingroup\$ What kind of application is this for? \$\endgroup\$ Apr 24 at 11:16
  • \$\begingroup\$ Seems to be a PFC inductor. Are "silicon ferromagnetic powder core" properties of this inductor known? If not, some measures need to be done ... for designing a "good" model. \$\endgroup\$
    – Antonio51
    Apr 24 at 11:39
  • \$\begingroup\$ @VerbalKint I'm using LTspice \$\endgroup\$
    – Cecemel
    Apr 24 at 22:16
  • \$\begingroup\$ I'd be interested to know the reason for the downvote and 2 close votes so far. \$\endgroup\$
    – Cecemel
    Apr 24 at 22:17

2 Answers 2

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Do you know that you need to model the nonlinearity?

Usual progression of model capabilities is something like: inductor (gets the basic dynamics right); inductor with resistance (modeling loss over a modest frequency range); a more complicated RL network to model losses (wire and core losses, accurate over a wider frequency range), RLC networks to model winding self-capacitance or transmission line effects; and nonlinear models including saturation or anything else.

Also, mind that magnetic materials have notoriously complicated behavior, so, while there are quite a lot of effects that are known, that could be modeled (e.g. reduced (initial) permeability at low signal level; hysteresis; Barkhausen noise; etc.), the value that those features bring is less and less, and their omission justified more and more easily. Or that they can be substituted by average models (like core loss as a resistance, rather than modeling flux and hysteresis).

In particular, we might not be concerned with saturation, from a power supply design standpoint, because we merely need to check that performance is adequate at either extreme (zero or full bias). Or for signal filtering purposes, we might simply avoid saturation by a sufficient margin, and that ensures adequately low distortion.

So, manufacturers usually supply basic RL or RLC models, if they do at all. Coilcraft has some of the better resources, but only these (linear RLC) kinds of models.

I have constructed models myself, including nonlinear behavior, for a few components. Here is a ferrite bead model, fitted to characteristic curves (Laird provides DC bias curves for most of their ferrite beads):

https://seventransistorlabs.com/Modeling/SPICE/MI1206L391R_NL.ckt

Comparison (fine lines: modeled; fuzzy: datasheet):

https://seventransistorlabs.com/Modeling/Images/MI1206L391R_Overlay.jpg

You could use this function as a starting point, though as I recall, getting the fit right was a bit of a pain. It's probably not the right curve for a gapped ferrite core, but the soft saturation of a powder core might be close enough. You will need the L(I) curve for it, of course.

This probably isn't too useful if you aren't a SPICE expert already. Suffice it to say, then, such models are uncommon.

Some other design questions to consider. If this is a switching converter for example:

Economical:

  • This is quite a large inductor. Do you really need that much inductance?
  • If it's as high power, or voltage, as the inductance might suggest, will it have low enough core losses to even survive?
  • If it's being used at quite low frequencies, is that really a good choice? You will need quite large capacitors to handle the ripple current, too.
  • Note that capacitors can be further reduced by using a multi-phase interleave design.

I think it's easier to design a slightly faster, more compact converter, that's lower cost, than to take a (lazy?) way out with oversized components and low switching frequency. But, obviously, that's my experience talking. On the other hand, if you lack that experience: you can solve all these problems at small scale, developing your knowledge at low voltages and modest power levels, in relative safety, and then apply it to high voltages or power levels such as this. (Not that that helps solve whatever immediate project this might be for, unfortunately.)

Control:

  • You say peak currents are higher, why is that? Is this a voltage mode control? (Is this under control at all, or say just a fixed square wave in the simulation?)
  • Current mode controls are preferred, precisely for this reason: average or peak current is always regulated, entirely eliminating one failure mode of the converter (switch overcurrent). There are plenty of other ways to destroy it (overvoltage, overtemp), but eliminating one is huge.
  • Average current mode control is likely preferred, given the relatively high core loss of iron powder type cores. (These are a fine choice for high power levels, where the somewhat increased size might not be as much of an issue as the higher cost of low-loss ferrite parts.)

Or, if this is for filtering, the large value still seems dubious (read: I'm not sure offhand what applications would need this), but earlier comments regarding avoiding saturation may be relevant. Note that, if it's for filtering mains (like the larger inductors in a line impedance stabilization network (LISN)), mind the peak currents that nonlinear loads can draw (particularly SMPS without power factor correction (PFC)), and what effect that will have on network response with peaky loads. Input rectifiers can easily draw peak currents over four times RMS, so it adds up quickly for a network like this.

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  • \$\begingroup\$ Thanks a lot for the elaborate answer. Application is a 7.5kW boost converter (180v to 350v) with 3 interleaved phases. So each inductor will be boosting 2.5kW. The switching freq I chose for now is 10kHz, fairly low to keep the mosfet switching losses manageable. I'm actually using 2 of these 3ph boost converters to power a 3phase (230v, 50hz, max 10kW/phase) pure sine inverter from +/-350V rails. When the inverter loads aren't balanced across the phases (ex. 10kW, 2.5kW, 2.5kW), the load on the boost converter varies with a period of 1/50Hz, (1/2) \$\endgroup\$
    – Cecemel
    Apr 24 at 20:56
  • \$\begingroup\$ so I've implemented PID loops in LTspice to control the duty cycles of both + and - boost converters. Lowering the inductance causes RMS currents to increase, so I think that a reduction in inductor size would be offset by a larger cooling solution for the mosfets. As for the original question, I had noticed that peak currents exceeded the sat. currents so was hoping for a simple way to model the reduction in inductance, just to get a basic idea of what to expect in real life. (2/2) \$\endgroup\$
    – Cecemel
    Apr 24 at 20:56
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You can build a simple saturable core model using an op-amp and a 1-F capacitor as shown by Larry Meares in a paper he published in 1986. The basic circuitry is shown below and mimics saturation effects of an inductor:

enter image description here

The original document was released in IEEE proceedings.

You can also easily build a saturating model with SIMPLIS using the piece-wise linear model they supply:

enter image description here

The picture is coming from a recent seminar I built and you can download it from my webpage.

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