Is there any benefit using 2 NPN transistors for a NOT gate rather than one NPN transistor?
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\$\begingroup\$ Oliver, I'd recommend that you study this site, as it contains a great deal of expert knowledge contained within the schematics for TTL logic. If you follow the first cases and then see the progressions that took place over time, you will learn a great deal about the pros and cons. You may see some similarity in what you drew up, too. \$\endgroup\$– jonkCommented Apr 30, 2022 at 19:15
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1 Answer
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The single-transistor inverter has a quick turn-on, where collector current goes from near zero up to near 5mA (and collector voltage falls from +5V to near zero volts).
However, turn-off is quite slow in comparison, due to base storage of charge. That base resistor drains away base charge too slowly for a logic-high-to-low input transition.
The two-transistor version has turn-off time more commensurate with turn-on time, because base charge is actively drained away to ground by the collector-emitter part of the saturated input transistor.
Both of these versions suffer from a low threshold voltage, where noise immunity for a logic-low input is poor compared to noise immunity for logic high input.
For low-speed logic inverters, the simpler one-transistor version might be OK, but noise-immunity might favour having a higher threshold voltage than +0.6V. Separating the base resistor into two (a voltage divider) could raise threshold, and speed up the slow edge too, by lowering the resistance-to-ground:
If more complex logic connections are required, fan-out should be considered...how many of these simple inverters could be driven from a similar inverter? Not many. In this answer's schematic, a larger base-series-resistor combined with a smaller collector resistor improves fan-out a little. However, turn-on time versus turn-off time disparity still exists.
