# Parallel RLC Circuit with DC voltage source input

I am new to LTSpice and I am trying to simulate an RLC parallel circuit with a DC source. The ideal switch is initially open and then closed at t=0+. The input is an ideal DC source with 1V. I have a couple of questions.

1. Is my output voltage V0 correct, going to from 0V to 1V and then exponentially decreasing?
2. Why does the voltage V0 only reach 500mV when a 1Ω resistor is used and hit 1V when a 1kΩ is used?
• With an empty MYSW SW(), you're accepting LTSPICE's default internal switch resistance - do you expect it to be zero ohms? May 4, 2022 at 0:53
• Yes, I wanted to model an ideal switch.
– RSH
May 4, 2022 at 0:56
• Default is one ohm. I'd suggest not forcing zero - you may run into convergence problems... perhaps MYSW SW(Ron=0.001 Roff=1e6 Vt=0.5) May 4, 2022 at 1:21
• When I used (Ron=0.001 Roff=1e6 Vt=0.5), V0 goes from 1V to 0.5V exponentially and takes almost 3s to settle down.
– RSH
May 4, 2022 at 1:40
• Why don't you apply Linear Superposition principles for each element? and look at T=RC and T=L/R and V/Rsw = I surge , then Q=Zo/R , $Zo=\sqrt{\frac{L}{C}}$, I(C)=CdV/dt and V{L}=LdI/dt May 4, 2022 at 6:53