Electrical Engineering Stack Exchange is a question and answer site for electronics and electrical engineering professionals, students, and enthusiasts. It only takes a minute to sign up.
Sign up to join this community
I'm designing a 2 layer PCB, that contains an ESP32, a LoRa module, a GSM module, and some connectors to command relays.
The top & bottom layers are both ground planes, and I have 5V & 3.3V power rails.
Is ground stitching required for this board, and if yes, where should I place GND stitching vias?
I would appreciate any feedback about routing.
I would like to say that GND vias are always necessary
It is recommended to place GND vias all around the PCB, this allows to have a uniformity of the GND plane.
It is also recommended to place a via near each component pad connected to the GND
Before worrying about via stitching I would strongly recommend to remove traces on the bottom layer to an absolute minimum to have an as solid as possible GND plane there.
I don't know what degrees of freedom you have for the placement of your components and pin assignment, but at first glance this board appears to be solvable with almost no traces on the bottom layer.
Personally I most probably won't even bother with pouring the top layer with GND, if there is a reasonable solid GND plane on the bottom.
Since there appears to be some wireless stuff going on, you should make sure that there is no copper obstructing any antennas, of course.
I would especially recommend stitching vias where traces/buses intersect, especially when they do so at a large distance from any other return connection. Three near the crossing is the minimum to connect all four sides together (note that each bus cuts a slot in each layer, so there are four segments in question, at least locally), and four has nice symmetry.
The critical part is having a consistent impedance environment for a signal (trace) running over ground plane / within ground pours. The amount of consistency required is actually almost irrelevant, on a board this size, and using normal LVCMOS speed signals that most MCUs are capable of, for signal quality purposes -- but the concepts are what's important, and this has real consequences for EMC even into lower frequencies.
So, the important parts, don't cross a trace over a slot in the plane (which is why bus crossings require vias), keep the impedance reasonably similar (basically to say, keep the trace width, height over / distance to ground similar over the route), avoid large stub lengths, ensure short and wide ground-return paths (again, avoid slotting up GND!). And avoid islands, either by stitching them to GND, or removing them by area or lack of connectivity.
