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I'm attempting to communicate with an RS485 network with a raspberry pi pico, and I found a "hat" which includes a couple SP3485 transceivers, along with the supporting TVS diodes, etc. The manufacturer of this board has kindly published the schematic at the following address:

https://www.waveshare.com/w/upload/0/02/Pico-2CH-RS485.pdf

The problem I'm having is that I don't understand how this transceiver is supposed to function if the schematic is correct. It looks like the ~RE/DE pins are driven by the TX_ line, and pulled up to 3.3v when the TX_ is not driven high, but if that is the case, wouldn't the transceiver normally be in transmit mode since DE is pulled high, and when TX_ is enabled, wouldn't that pull ~RE to ground, enabling receive mode?

Also, how can DI be tied to ground? It seems like it would be impossible to transmit on any channel.

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  • \$\begingroup\$ Weird schematic indeed. Did you confirm it is matching the actual pcb? \$\endgroup\$
    – Eugene Sh.
    May 9 at 18:02
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    \$\begingroup\$ Not yet. I originally was looking at the schematic to understand how they were able to drive the SP3485 chip with only 2 gpio pins from the microcontroller. In doing so, I realized I didn't understand how it was being driven at all. \$\endgroup\$
    – ryanshow
    May 9 at 18:13
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    \$\begingroup\$ There are several RS485 transceiver ICs available. Trying to build one using only discrete components does not make sense. \$\endgroup\$
    – Uwe
    May 9 at 18:36
  • \$\begingroup\$ The fail safe resistors R7 & R9 are not going to guarantee the minimum differential input voltage if the line is disconnected. They, along with R8, would only provide 42 mV of input voltage difference with the line open - not enough to guarantee the output state of the receiver. \$\endgroup\$
    – SteveSh
    May 9 at 19:38
  • \$\begingroup\$ When I see things like that, it causes me to call into question the rest of the design. \$\endgroup\$
    – SteveSh
    May 9 at 19:38

4 Answers 4

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The normal (idle) state of the Pico UART output is high; this turns the transistor on through R1 or R11, which disables the transmitter (DE low) and enables the receiver (/RE low). Received data drives RO high or low, which is connected to the RX_CH0 or RX_CH1 signal on the Pico connector.

To transmit a '1' bit, the UART output will also be high, so the transmitter won't be driving the RS485 bus, and the pull up/down resistors will cause the A line to have a higher potential than the B line, so outputting a '1' (same as idle state).

To transmit a '0' bit, the UART output will be low, which will turn the transistor off, disabling the receiver (/RE high) and enabling the transmitter (DE high). As the DI pin is tied low, the RS485 output will be low, as the A line has a lower potential than the B line.

The only slightly strange decision is that R8 and R18 have such low values, in comparison to the pullup/pulldown resistors; presumably they're also sort-of acting a line terminations to reduce any reflections, but at the quoted maximum speed (500 kbaud) I wouldn't have thought that is a real issue, and a higher value would decrease current consumption (especially in multi-drop configurations), and increase noise immunity.

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  • \$\begingroup\$ I'm certain R8 & R18 are there for line termination, as you mentioned. But keep in mind that whether or not line terminations are needed depends on the length of the interconnect and the edge speed of the signal, and not on the baud rate. \$\endgroup\$
    – SteveSh
    May 9 at 19:31
  • \$\begingroup\$ Thank you. This answer, along with the answer from @cl has allowed me to completely understand the intentions behind this transceiver setup. \$\endgroup\$
    – ryanshow
    May 9 at 19:39
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An RS-485 bus has three states: high, low, and idle. An UART signal has two states: high and low; when the UART is idle, the signal just stays high. It is therefore not possible to reliably control an RS-485 bus from only a UART line.

That adapter tries anyway. When the UART signal is low, the RS-485 bus is driven to the low state; when the UART signal is high, the bus is idle. Any RS-485 receivers on the bus will read this bus state as high because the fail-safe resistors R7/R9 (or the built-in failsafe function of some receivers) will generate A>B voltages when the bus is not driven otherwise. The problem with this is that the resistors only weakly drive the bus, i.e., that signal edge will be slower, and the noise margin will be smaller.

In this circuit, the DI input has an effect only when the transmitter is active, which happens only when TX is low, so connecting it to ground makes sense. (Connecting it to TX would make no difference.)

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  • \$\begingroup\$ Are you saying that the transmission will be "modulated" using the DE? \$\endgroup\$
    – Eugene Sh.
    May 9 at 18:50
  • \$\begingroup\$ Thank you for the clear explanation. \$\endgroup\$
    – ryanshow
    May 9 at 19:47
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The board is very questionable, or at least it may be made for some specific non-standard purpose, as there are many things that are not typical for a standard RS-485 interface.

It is possible that you might not be able to use this board for communicating with a device that expects a more typical RS-485 implementation, and worst case is that using this adapter incorrectly could cause even damage.

So as mentioned already, it's a bit uncommon. The RS-485 chip is by default in receive mode, listening the bus and the MCU UART can receive it.

If no other device drives the bus, the 4k7 bias resistors keep the bus weakly in a near-idle state so the receiver outputs a high level logic 1. I say near-idle, because the voltage set by this board will not be withing RS-485 specification of logic 1, but many receivers that implement fail-safe input should consider it as logic 1, while other receivers don't. So these resistors are enough for this transceiver to be idle, but if another device on bus expects proper idle state, it should already provide proper failsafe bias itself, or it must be provided externally.

But when MCU transmits, it can only control the driver enable pin, and can either send a strong low level logic 0 to the bus, or let the bus float back slowly and weakly to the near-idle state.

This basically is approximately equal to a differential version of an open-collector bus, or rather, more close to a CAN interface, where the situation is similar - either bus floats in an recessive idle state, or any device can force the bus to dominant state, and there are no collisions.

But in this case, if the other device wants to transmit a logic high and this board wants to transmit logic low, then there will be collision, so it might be intended to communicate only with other similar RS-485 devices that never transmit logic high.

Also, please note also a few important things.

First, both tranceivers have a 120 ohm termination resistor present, so if your bus already is correctly terminated with termination resistors on both ends of the bus, this board will incorrectly add a third termination which may cause it not to work correctly.

Second, even more dramatic thing is that while the connectors have three pins, the third pin is not connected to board ground. Without a common ground reference, the common mode voltage between devices may float out of operating range of the RS-485 transceivers, or in worst case, make damage to devices.

And thr fact that not all transceivers are compatible with the voltage levels of the idle state set by the fail-safe resistors, unless the other device has stronger fail-safe resistors in it.

Depending on to which device you are intending to connect this and how the ground references between devices are connected, it may not work and might even damage something.

So if you intend to continue using this adapter, make sure you understand how these devices work before connecting them to be sure you can do it safely without damaging the devices.

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  • \$\begingroup\$ The 4.7K resistor do not keep the bus weakly in an idle state. It keeps the bus in an unknown state, 42 mV vdiff. \$\endgroup\$
    – SteveSh
    May 9 at 20:25
  • \$\begingroup\$ @SteveSh You are correct that 42mV is not a valid level on bus and thus it won't be compatible with all possible transceivers. However, the chips have to use some level with some tolerance and hysteresis, and this chip boasts that it implements a fail-safe input. The datasheet of this chip fails to mention what is the actual level, but many other failsafe transceivers do, and they set the level to 20 to 50 mV negative, so that 0V difference is guaranteed to be logic 1. Such transceivers would be compatible. \$\endgroup\$
    – Justme
    May 9 at 21:10
  • \$\begingroup\$ @Justme-The fail safe provision for this chip says (from the data sheet) "The receiver is equipped with a fail-safe feature that guarantees the receiver output will be in a HIGH state when the input is left unconnected." However, the way this chip is used on the board, the inputs (to the chip) will never be unconnected (unless some components are removed). Disconnecting the cable to this board results in a operation-unspecified condition on the inputs to the chip. \$\endgroup\$
    – SteveSh
    May 9 at 22:54
  • \$\begingroup\$ @SteveSh Depends on the manufacturer of SP3485. Maxlinear SP3485 datasheet says logical 1 is voltage above -50mV and logical 0 is voltage below -200mV. \$\endgroup\$
    – Justme
    May 9 at 23:56
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For 4-wire (full duplex) RS485 between two devices, all you need is really TX and RX. The driver is permanently enabled.

For 2-wire (half duplex), you need three GPIO pins: driver enable, RX, and TX.

Some “clever” people use an RC-like circuit from TX to derive the output enable signal. That’s not the best idea, since it only works when there’s sufficient inter-packet delay respected by all nodes.

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    \$\begingroup\$ Still, this schematic has DI grounded, so I don't see how it can work for transmission. \$\endgroup\$
    – Eugene Sh.
    May 9 at 18:40
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    \$\begingroup\$ @EugeneSh. It is basically transmitting a dominant logic 0 or not transmitting anything which is a recessive logic 1 set with the failsafe bias resistors. Basically what CAN bus does. \$\endgroup\$
    – Justme
    May 9 at 20:07

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