The frequency response of a capacitor says a capacitor has a high impedance at low frequencies and it has a low impedance at high frequencies (up to the capacitor's resonant frequency.)

If we use a capacitor that has a decoupling capacitor, so shunted to ground, then why for a DC source do we say the capacitor acts like a short at startup (t=0) thus having a high inrush but according to the top paragraph a DC source has a 0 Hz frequency so it has a very high impedance.

This clearly is a contradiction. Can someone explain how this theory works?

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    \$\begingroup\$ When you turn the system on, the "frequency" of the pulse is nearly infinite. \$\endgroup\$
    – Eugene Sh.
    May 10, 2022 at 18:57
  • 1
    \$\begingroup\$ Alternately, the voltage across the capacitor at startup is Vc = Q/C where Q = 0. \$\endgroup\$
    – vir
    May 10, 2022 at 19:09
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    \$\begingroup\$ At startup, the DC source is not a constant voltage source; it is a vigorously changing voltage source. \$\endgroup\$ May 10, 2022 at 19:19
  • \$\begingroup\$ In five words: startup is not zero Hertz. \$\endgroup\$
    – Kaz
    May 12, 2022 at 7:10

8 Answers 8


You are mixing up two very different concepts.

When you talk about impedance you are implicitly examining the behavior of the system in an AC steady state condition, i.e. when excited by a sinusoidal signal.

When you talk about "start up" you are looking at the behavior of the system during a transient. This is a completely different regime, because, by definition, steady state is the regime you have when any transient has already died off.

So, whenever you excite a discharged capacitor with a signal that "starts up", i.e. is zero before a given instant of time, the capacitor is subjected to a transient response that dies off after some time (depending on the time constant of the circuit).

Only after the transient response of the system has terminated you can consider the circuit in steady state, and only then the V-I relationship can be computed using the impedance.

This is true even if you apply a sinusoidal signal that "starts up", i.e. not an ideal sinusoidal signal (which is infinite along the time axis). If the signal "starts up" there will be a transient response before the steady state kicks in, even if the part after start-up is sinusoidal.

Note: I simplified a bit the discourse to avoid delving into circuit modeling and differential equations analysis. The details may be more complicated depending on the specific circuit the capacitor is in and depending on which specific signal is applied.


BTW, to answer explicitly the title question, the basic relationship describing a capacitor is this:

$$ q(t) = C \cdot v(t) $$

where \$q\$ is the charge "stored" in the capacitor, \$C\$ is the capacitance (constant for linear caps) and \$v\$ is the voltage across the cap. BTW, if you apply a time derivative to both member you get the usual V-I relationship for linear caps, i.e. \$i(t)=C \cdot \frac{dv(t)}{dt}\$

Nitpick: i quoted "stored" because a capacitor doesn't actually store charge, but energy. The net charge inside a cap is always zero. The energy comes from charge separation between the two plates.

In the formula above note the time dependency. That formula is valid for each instant of time. If at a given time \$t_0\$ a capacitor is not charged, by definition, it has \$q(t_0)=0\$, hence \$v(t_0)\$ must be 0, even if some current in that instant of time is flowing. Therefore, at that instant, the capacitor is like a short circuit: current flowing, no resistance and no voltage across it.


You are mixing up two different operating regimes for the capacitor.

In the case where a constant AC sinusoidal waveform is put across a capacitor the impedance = 1/2.pi.f.C.

In the case where a DC voltage is applied to a capacitor we are assuming that the capacitor has been previously discharged. The voltage across a capacitor can not change instantaneously so the initial voltage across the capacitor is 0. The capacitor then charges to the value of the input voltage and current stops flowing. Under this steady state condition its impedance seems to be infinite.


This phenomenon can be better explained in time domain than in frequency domain.

Strictly speaking, a capacitor is not a short connection since its terminals are separated by an insulator. It rather behaves as a short connection with respect to the voltage drop across it.

Both they - a piece of wire and a discharged capacitor (at startup), have zero voltage drop across themselves; so the current is maximum.


This clearly is a contradiction. Can someone explain how this theory works?

Let's try to explain using fundamentals.

Here's the basic capacitor current-voltage relationship:

$$ i_c(t) = C \ \frac{d}{d t} v_c(t) $$

The frequency response of a capacitor comes from this formula.

Now, if you apply a DC voltage to a completely discharged capacitor, and if you do this suddenly (i.e. in almost zero time) the rate of change will be almost infinite:

enter image description here

\$dv_c\$ is a non-zero number but \$dt\$ is almost zero. This brings \$dv_c / dt = \infty\$

Put this into the current-voltage relationship formula and you'll see that the current flow through it will be very high for a short time (i.e. until the capacitor charges up completely).

Another approach can be to use the charge-voltage relationship:

$$ Q_C = C \ V_C $$


$$ C = \frac{dq}{dv_c} $$

These tell us that if a capacitor is completely discharged before applying any voltage then the voltage across that capacitor is zero.

Now if you apply a voltage across that capacitor suddenly (i.e. in almost zero time) the current flow through that capacitor will be infinite. Because,

  • The current flow is determined by the voltage difference and the resistance (\$I = U/R\$)
  • The wire between the voltage source and the capacitor has almost zero resistance.

And also you may want to think about the current change:

$$ i = \frac{dq}{dt} $$

along with capacitor voltage-charge relationship. Remember that the first formula comes from these two.


When the circuit is powered off, the capacitor sees a 0 Hz (zero hertz) signal which, by chance, is at level 0 V (zero volt).

When you power on, there is a transient: 0 volts change to X volts. That transient contains a lot of frequencies, actually infinite frequencies (refer to Fourier spectrum); among those frequencies, some are low frequencies but most of them are very high frequency.

In this transient, the capacitor conducts higher frequencies and, as they are many many many, it looks like a short-circuit.

When the transient terminates, we have again a stable voltage: a signal of 0 Hertz. The capacitor blocks that frequency.

So, it seems, there is no contradiction and everything is coherent and correct.

At power on, we have a rising edge like the one in a square wave. That edge contains a lot of frequencies, as can be (partially) seen on this site:

Fourier of a step

Those coloured lines are those frequencies where the capacitor has non-infinite impedance, hence it conducts.


Because you do not have infinite energy.

The voltage across a capacitor is proportional to the charge on its plates. This means that during a transient, such as the charging at start up, the voltage is proportional to the time integral of the charging (or discharging) current.

On finite time intervals, the value of the integral of a continuous and bounded function - like current in the real world - cannot be discontinuous.

It follows that the voltage across a capacitor cannot change instantaneously, if the current stays finite. So at t=0+ there is no change in the voltage across the cap and any change in the voltage on the first plate will have to be present on the second plate.

You basically need time to add charges on one plate and removing them from the other.

(I would have put a formula or two but this site has made it very difficult for me to add anything more than simple text. You can find them, for example on Millman and Taub, "Pulse, Digital and Switching Waveforms", 1965 - chapter 2, section 2.1 "The high pass RC circuit")

  • \$\begingroup\$ In the real world the capacitor has intrinsic impedance, and there's always a series resistance (its connecting leads). However, both can be small enough that start-up surges need special consideration. \$\endgroup\$
    – nigel222
    May 11, 2022 at 9:23
  • \$\begingroup\$ The internal resistance of the capacitor or the external resistance of the terminals have nothing to to with the fact that voltage is the state variable for a cap. They can limit the maximum current making it even harder to raise the voltage, bit even if that resistances were exactly zero you would not be able to instantaneously change the voltage across the cap. And if you consider either of those resistance to be part of the cap, then the voltage across this new real cap could not be zero during charge and discharge, contradicting the hypothesis made by the OP (cap appears shorted) \$\endgroup\$ May 11, 2022 at 23:02

A DC source switched on at \$t=0\$ of magnitude V afterwards and 0 before has a DC component of V/2 and The Fourier transform $$V\cdot\biggl(\frac{\delta(f)}2+\frac1{2\pi j f}\biggr)\;.$$ Once you realise that "DC" implies constantness into the infinite past, it is not associated with any "inrush current". But that is not what a switched DC source is. It turns out that transients are easier to model by using the Laplace transform rather than the Fourier transform since the different convergence realm leads to fewer headaches.


We get the differential equation for capacitors, \$i(t) = C\frac{dv(t)}{dt}\$ from physics. I really like Greg Durgin's videos on applied EM.

As others have mentioned, the voltage across the capacitor at startup is not DC but a step function with amplitude \$a\$, \$v(t) = a\cdot u(t)\$.

The current is then \$i(t) = C\frac{d}{dt}a\cdot u(t)=C\cdot a \cdot \delta(t)\$ where \$\delta(t)\$ is the Dirac delta function. There is infinite current at \$t = 0\$ and zero current at all other time.

Regarding the spectrum of the current, it is the Fourier transform of \$\delta(t)\$ which is a constant at all frequencies.

This is all for an ideal capacitor. In reality, there will be finite resistances in the circuit which turn the step function into something like \$v(t) = a \cdot (1 - e^{\frac{-t}{\tau}}) \$ and the capacitor current will be \$i(t) = \frac{a}{\tau}e^{\frac{-t}{\tau}},\ t > 0 \$. The spectrum of the current will be bandlimited; in this example it would be \$i(s=j\omega) =\frac{a}{1+ \omega \tau}\$.

It was interesting for me to answer this question. I didn't realize there was equal current at all frequencies, including DC. The impedance at DC is infinite, but so is the voltage. Using L'Hopital's rule we can verify that the current at DC is equal to the current at all other frequencies. Even though the capacitor plates are separated by an insulator, we get some charge transfer due to the displacement current, which has a DC component.


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