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I am trying to model a PCB trace as a R, L, C circuit.

Assumption: My PCB has a a single trace running through it. Just giving input from one side and taking output from other. There is not even a GND plane. There is a seperate wire outside the PCB to complete the circuit and provide the return path. Let's even assume that the outer wire is completely ideal (no losses).

Now, the power is surely going to drop over long distances, which will be total drop over R, L and C. If I were to model it as a R, L, C circuit:

  1. What will be the dielectric constant and permeability constant for a top layer trace?
  • Will it be that of copper? I have seen an effective dielectric constant of around 3 being used for microstrips accounting also for air. But, the doubt is, in general PCBs have stray capacitances, coupling capacitances etc. thus making it an effective dielectric constant, while in the above case, none of them exists.
  1. What will be the case for an middle layer trace?

Dielectric constant for FR4=4.3, but copper is continous right, So why not to use that of copper?

Thanks in advance!

Edit:

If I change the model to that of a single conductor on a PCB, (like a part of some larger circuit is on the PCB, so the circuit is complete), will that help?

  • How to calculate R, L and C values in that case for both top layers and middle layer?

  • What will be the dielectric and permeability constants in such cases?

Point is not to use rule of thumb but to understand the basics of PCB layout.

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    \$\begingroup\$ microstrip is above a ground plane, so there's your model blown for a start. You can't have a well defined model circuit of a single conductor, its behaviour will be dominated by the separate wire outside the PCB that completes the circuit and provides the return path. You can have a model of a single conductor, using R values from copper, and L values like 1 nH/mm rule of thumb. \$\endgroup\$
    – Neil_UK
    May 14 at 4:45
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    \$\begingroup\$ @Neil_UK , thanks ! got your point,edited the question. But aren't the rule of thumb values like 1nH/mm an average of values calculated from numerous number of PCBs incorporating everything like GND planes, coupling effects, fringe effects etc? I think that won't serve the purpose of the question which is just to clarify the basics. \$\endgroup\$ May 14 at 5:07
  • \$\begingroup\$ an inductance only makes sense for a current loop. if there is no return conductor, the notion of inductance is meaningless. and once you know the loop, its area determines inductance. the conductor length is inconsequential. \$\endgroup\$
    – tobalt
    May 14 at 5:34
  • \$\begingroup\$ @tobalt There is the concept of partial (self) inductance though which in my opinion is quite useful. If you think about it, single components don't create complete current loops and yet specify (partial) inductance. \$\endgroup\$ May 14 at 6:05
  • \$\begingroup\$ @LarsHankeln yet, the "self" inductance of a wire (magically) depends on where the other wires are, and not to a small extent but orders of magnitude. So Curious is right that it cannot be used here. \$\endgroup\$
    – tobalt
    May 14 at 6:15

1 Answer 1

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L and C are simplifying names given to certain properties of conductor and dielectric geometry.

If you know the geometry, you already know something more fundamental than the potential L and C values that you could assign to the lumped circuit. And the L and C representation is always going to be less accurate because it assumes a section (or the entirety) of the circuit to be lumped.

Transmission line representation is also a approximation for conductor and dielectric geometry that is highly symmetric in one direction.

If your arrangement doesn't correspond well to either of these simplifying scenarios, one can only derive accurate behavior by solving the physical behavior for the actual geometry, i.e. Maxwell equations and finite element method.

But as a coarse estimate: the permeance of the medium around the current loop enhances the inductance. If there is lots of high permeability material, this relative permeability will give the inductance increase factor. But if there are substantial gaps with relative permeability of 1, the inductance increase will quickly plummet to none. Likewise, the same applies to the electric fields and dielectric constants.

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  • \$\begingroup\$ thanks. I agree that the lumped model and Transmission line model may not be fully accurate. But PCB layout is done keeping these models in mind,right ? We care about the resistances, capacitances and inductances produced unwantedly by the conductor during the layout. I am just interested in finding out the basics of PCB layout. While in presenceof GND planes and other traces , C/L calculation is easy, using constants for FR$etc, what if they are absent ? What about the trace thickness, width, length and current flow through it and their effects on R,L and C ? \$\endgroup\$ May 15 at 5:20

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