I'm trying to implement the circuit below from here: http://www.mosaic-industries.com/embedded-systems/microcontroller-projects/electronic-circuits/push-button-switch-turn-on/switching-battery-power.

However, the switched output is immediately energized and does not shut off. After troubleshooting, the issue seems to be related to the MOSFET. I had to replace the si3588DV mentioned on the website with something I thought was equivalent. I used DMC3025LSD because it seemed like it had a low gate threshold voltage which the link above emphasized: https://www.diodes.com/assets/Datasheets/DMC3025LSD.pdf. I also had to use an alternate diode instead of BAV99, I used BAW56: https://www.mouser.com/datasheet/2/916/BAV756S_BAW56_SER-1541814.pdf.

I've looked over my schematic and troubleshot the circuit, but can't think of what would cause this issue. It seems like it's due to the MOSFET that is used, but if it was an issue with the MOSFET/gate threshold wouldn't I expect it to never turn on?

Another thing that I found odd is when I measured the voltage at the gate of the P-MOSFET, it was approximately equal to 0V even though it was directly connected to the battery voltage through R20.

Thank you for any help!

My Schematic

Source Schematic


1 Answer 1


The problem might be the internal drain/source capacitance of the P fet. If you connect your battery, the voltage of the P fet source rises very fast and feeds this delta-U forward to it's source. There is no output capacitor to hold against, so the positive edge is fed through C5 into the N fet gate. About 60pF S/D of the P fet try to charge about 500pF G/S of the N fet. This may be successful, the N fet threshold level can be reached and it turns on. There you are.

Add a simple 100nF output capacitor to GND, then the 60pF will have no chance. The same may happen through C4, feeding the edge to the drain of the N fet and the reverse transfer capacitance of the N fet feeds a portion of that to it's gate. Both effects affect the N fet gate and act synchronous. You can suppress this with 1nF between gate and source of the N fet. It is possible, that you don't have the problem, if a load with internal capacitor is connected.

By the way: If the N fet is on, C3 sees GND on the right side. If it's charged up by R19, the poor button switch must discharge all the cap energy without current limit. On the long run this button will fail. Add some ohms (e.g. 100) in series with C3 to be polite to the button.

With your actual fets the circuit will need 4V minimum to work properly. Don't worry about the diode type.

  • \$\begingroup\$ Thank you for your detailed response! Good to know about the diode, didn't think it was the culprit but figured it'd be worth mentioning. Interesting about the 4V minimum voltage, where did you come up with that? I'm running off a 3.7V LiPo battery so that could well be the issue. Also when you mention the 100nF output capacitor, that'd essentially be between the drain of the P-FET and GND? \$\endgroup\$
    – Ceiling
    May 18, 2022 at 2:49
  • \$\begingroup\$ I had a short look at the data sheet of the fet. You should not operate the fet with a gate voltage below the plateau for stability and thermal stress. The plateau is at 3.8V so I saved in my mind: 4V is safe for the usual temperature range. The original si3588DV has the plateau at 1.5V, I recommend to use this with a single LiPo cell here. Yes, I agree to the 100nF place. \$\endgroup\$
    – Jens
    May 18, 2022 at 4:20
  • \$\begingroup\$ Good to know! Where is that plateau listed? I didn't see anything like that listed. Only thing approximately equal to 4V I saw was the transfer characteristics curve of the G-S voltage and D-S current. Or is that just the value from the product summary listing D-S resistance for different G-S voltage values? \$\endgroup\$
    – Ceiling
    May 18, 2022 at 13:54
  • \$\begingroup\$ For the N channel in DMC3025 it is Figure 11, Vgs vs Qg. In Figure 1 you can see the same where at Vgs=4V it's "safe on" for your application. \$\endgroup\$
    – Jens
    May 18, 2022 at 14:02
  • \$\begingroup\$ Turns out it does work after all! With a load on the output the power switches as I expect. What's odd is that it won't turn on again after a power cycle. I measured Vin and measured a stray voltage which must be enough to keep the gate of the P-FET activated. After the voltage bled off, the circuit switches like I expect. I'm thinking decreasing a capacitor value may help, I was thinking C3 from 1uF to .1uF, I'm not sure the exact purpose of this cap but thought it may have something to do with the behavior I observed. \$\endgroup\$
    – Ceiling
    May 18, 2022 at 19:04

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.