When I made errors in my assumptions for specs. My choice words fit, there is no significant change in the 2nd order equation simplifying it to a 1st order equation. s^2 factors cancel out when the roots of the first order are only an octave apart. There is no significant change or benefit.
Hence @Antonio51 is 100% right.
Doing a sensitivity analysis with the derivative of H(s) proves that.
mY error: fmax is H(s)=0 dB with breakpoints 1 octave apart and 12dB space can never achieve 40 dB/dec or 12 dB/octave and almost 4dB /octave. where 3 dB/octave is used for Pink noise filters.
From the symmetry of this question, there is a simple passive approach.
Rule of Thumb.
The more mistakes you correct, the more careful you try to be in making fast assumptions. But then you don't have to be brilliant ("I arn't") just work harder to correct them and gain more experience. Most of my Analog/ SCADA experience was my 1st 5 years in Aerospace 40 years ago.
NEVER ASSUME ANY DESIGN IMPLEMENTATION SPECIFICS before you identify the key measurable design specs. (remember there is a U between "ass and me" if I tell you to use this when you know there is a better way.
Write Specs, then solve
- This is #1 cause of design failures by EE/ESE/ECE students who graduate, even the best students. If you find yourself thinking, how can we do this with a ? before you document a well-defined problem. i.e. write a design list of specs 1st. Then break it down into functions with I/O parameters & tolerances. Then start the 2nd stage, the realization part of the design. 3rd stage is verify.
- Write measurable design specs 1st then design to meet or exceed.
There must be some shunt attenuation for partial gains. This is also called a Lead-Lag attenuator and is common for PLL compensation loops as it adds +ve phase margin to the loop when used near unity gain. However, there the breakpoints are better selected one decade (10:1) apart and not just 1 octave apart (2:1) which is only 12 dB difference between a gain of 0.25 and 0.25. and over a much wider span 12 dB/octave.
Thus you never achieve 12 dB/octave because of the -3dB breakpoints typically select for the half-power bandwidth. So it is only 6dB/octave unless you raise the Q for more phase shift (which is not needed here) So you might assume maximally flat Butterworth or something else as long as you define that assumption not given.
While we're at it, since there is no gain, we might as well consider a passive filter with say 1k to 10k input impedance.
Disregard unless to consider a different problem
DC gain = 0.25 (~-12 dB = -20 log(4)) 2nd order ramp up at 10 rad/s
HF gain = 0.5 (~-6 dB) 2nd order ramp to flat at 20 rad/s
2nd order equation implies THERE MUST BE TWO REACTIVE ELEMENTS minimum.
The Breakpoints and BW are defined by the "half-power point" ~ -3dB so each point reduces the slope from 2nd order 12 dB/octave to only 6 dB actual at each breakpoint -12,-6 dB and "appears like a 1st order filter" yes is a 2nd order filter. It isn't because the asymptotes are too close together and thus interact with each other.
Inverting / Normal (optional)
Lead-lag phase frequency response with 6 dB dirfference ramp up from asymptotes 10 to 20 rad/s
This can be done with Resistor ratios or Capacitor ratios but in this case as a lead-lag filter or flat with a HP then LP in between.
- direct R path 3k:1k satisfies the -12 dB LF 1st breakpoint
- AC path 1k:3k > R1//R2=Req satisfies the 2k:2k -6 dB HF 2nd point
- The centre frequency will be the RMS product of each breakpoint 10, 20 rad/s= 14.14 rad/s = 89 Hz
- Verify the max Phase lead-lag compensation circuit is maximum at 89 Hz with 5% parts.
All the boxes are checked. Design complete.
However , your Prof may expect you to do it the hard way the 1st time.
My simple approach only used a few minutes to create with experience and >30 minutes to write this up. You will be able to do this later too.
With experience, Feinmann could do this in his head.