This is R-type RISC-V instruction

This figure represents RISC-V R-type instruction. Let assume this instruction is for add operation. When this instruction is given to the processor it adds rs to rt.

My question is how rs and rt already holds the values we want to add? How these values are written in these blocks?

  • \$\begingroup\$ I'm not sure where your confusion is here--you can just use other commands to put values in the registers. Not familiar with RISC-V but the mnemonic for the relevant instruction is usually mov or sometimes ld. \$\endgroup\$
    – Hearth
    May 22, 2022 at 14:39
  • 2
    \$\begingroup\$ Previous instructions do that. And if they didn't, you can't expect this instruction to give the right result. \$\endgroup\$ May 22, 2022 at 16:12
  • \$\begingroup\$ Thank you both of you. Your answers cleared my confusion. \$\endgroup\$ May 23, 2022 at 14:55

1 Answer 1


They are written by other instructions. An example program made of 4 instructions could be:

  1. put the number 5 in register 3
  2. put the number 6 in register 7
  3. add register 3 and register 7; store the answer in register 2
  4. put the number in register 2 in memory address 1234

I am speaking in general, not specifically about RISC-V. Maybe on RISC-V, step 4 actually takes two instructions, as it does on some CPU types.

When a number occurs directly in the instruction we can call it "hard-coded" although a more technical term is that it's an "immediate value". Values can also come from other places, e.g.:

  1. put the number from memory address 12345 in register 3
  2. put the number 2 in register 7
  3. Bitwise-AND register 3 and register 7; store the answer in register 2
  4. If the number in register 2 isn't zero, then go to step 27.

and maybe memory address 12345 is hardwired to connect to the keyboard. It is typical that CPUs connect to the outside world by using special memory addresses that connect to things that aren't memory.


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