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Could anybody please help in understanding the parameters of Digital transistor from its datasheet. Basically i need two parameters which decide the Maximum voltage for off state(0 state) and minimum voltage for the ons state( 1 state).
You can take the below datasheet as a reference http://www.onsemi.com/pub/Collateral/DTC143E-D.PDF
According to the datasheet, the typical values are <1.2V for OFF. and >2V for ON.
The datasheet shows the internals of the transistor, which looks like this (a rough approximation using a typical NPN) R2 and R3 are internal to the transistor. R1 is not part of the transistor, it's just a typical load to work against for the simulation:
If we sweep the input voltage from 0 to 3V (x axis) we can see the transistor begin to turn on around 1.2V and be almost fully saturated around 2V, which is roughly what datasheet states:
First, you need to realize that digital transistor is not a universal term. Marketing people sometimes try to make up new terms for whatever they are selling to make them sound different and special. In this case, this "digital transistor" is a ordinary NPN transistor with base resistors:
R1 allows connecting pin 1 directly to a digital output. R2 forms a voltage divider with R1 such that the voltage on pin 1 needs to be more than the roughly 700 mV B-E drop of the bare transistor for the transistor to turn on. Presumably the pin 1 threshold at which the transistor starts to turn on is about half of the logic high level. This helps with noise margin.
To get the maximum off state voltage this transistor can withstand, you look for the same parameter you would for any ordinary transistor. After all, this is a ordinary transistor with two extra resistors added. You can get exactly the same thing with a transistor and two separate resistors. See the table of "OFF CHARACTERISTICS" on page 4:
The last two clearly answer your off state voltage question. The answer in this case is 50 V.
The minimum on state voltage is again just a function of the transistor. Most silicon transistors will saturate at around 200 mV with little current, and go up a bit from there at high currents. Again on page 4, look at the "ON CHARACTERISTICS" table:
VCE(sat) is 250 mv with 1 mA of input current. Then VOL is shown as 200 mV with 2.5 V on pin 1 and 1 kΩ load to 5 V on the collector. In other words, it behaves pretty much like any other ordinary small signal NPN transistor on the output side, which shouldn't be surprising since it is a ordinary small signal NPN transistor.
