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I have this Zybo Zynq-7000 board. The board has a USB interface to configure FPGA as well as JTAG pin headers:

Zybo Zynq-7000

This is the second board, an Ultra96-V2 which doesn't have a USB to configure FPGA. It only has JTAG pin headers: Ultra96-V2 Can I use the JTAG header on the Zybo board to configure FPGA on the Ultra96 board? (My intention is not to buy another UART to JTAG converter if it is possible "chain" it from the Zybo.)

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Proper JTAG implementation can be chained as you say. It's called a scan chain, after all.

Usually FPGAs and their configuration memories have full JTAGs so it's no problem.

The idea is to chain the TDI to the previous TDO and then 'loop back' the last TDO to the connector. Other signals are simply in parallel. It's like expanding a shift register, simply because the core of JTAG is a shift register.

Then you have to say to your programming tool the position of each device in a chain so that it can put in bypass the other ones. That could be tricky since a lot of software is… lets say manufacturers don't like each others.Given that both are Xilinx based tell Vivado or the tool you are using the position and you are set.

There are lots of resources but in your case I'd just pick up UG470 7 Series FPGAs Configuration User Guide and read chapter 9 Chapter 9: Multiple FPGA Configuration, Serial Daisy Chain Configuration (i.e. the actual configuration manual for your part)

EDIT: that's assuming that your zybo JTAG is 'openable', it isn't clear from the block diagram and couldn't find any references for it in the manual. Often there are jumpers for that, ask Digilent/NI

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  • \$\begingroup\$ I have to understand if my two FPGA will be identified automatically or not. Or this chain needs to be defined to Vivado explicitly by me? \$\endgroup\$ Jun 1, 2022 at 7:48
  • \$\begingroup\$ What do you mean with 'openable'? There are 6 pins connectors on the board. And relevant selection pin header doing short/open according to the configuration used(JTAG, USB, Flash). \$\endgroup\$ Jun 1, 2022 at 7:51
  • \$\begingroup\$ Probably Vivado will find them correctly; with 'opening' i mean that the TDO from the first board need to be put into TDI of the second and the TDO of the second must go to the JTAG port instead of the first one \$\endgroup\$ Jun 3, 2022 at 7:23

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