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I'm trying to design a grid tie inverter.

I have designed a 4-layer PCB and I have a few questions about the layout and grounding.

I have been closely following this reference design but I'm using ordinary MOSFETS (STF35N60DM2.) My plan is to add in the microcontroller board to the header on the PCB here.

Schematic

Split Ground planes (2nd layer

Power planes 3rd layer

The 360 V DC bus is provided by a separate isolated supply and enters into J2 on the right of the PCB. I also have an isolated 16 V DC supply which enters into J1 on the left and provides power for all the logic and gate drive.

I have Hall effect current sensing on both phases, I have voltage sensing on both phases and I have a DC bus voltage sense. All these traces run back to the microcontroller unit.

In the reference design, they use a split ground (power ground and logic ground) with a single connection point. I have so far copied this but am wondering whether it'd be better to have a single ground plane.

The power components are all kept on the right of this PCB. With the split ground design, I'm concerned about the gate drive currents (that keep the bootstrap capacitors charged) causing interference on the analogue voltage and current sense readings.

Can someone offer advise about my layout and grounding choices?

There must be an optimal way of doing things. Is it ok to run my sensing traces like I have done?

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  • \$\begingroup\$ What PN are you using for a gate driver? I cant find that DGD... number. The internal structure of that chip will help us understand how the gate drive and bootstrap currents flow. \$\endgroup\$
    – Bryan
    Jun 2 at 16:11
  • \$\begingroup\$ Are you familiar with UL 1741? A grid-tie inverter is not a thing to homebrew because the safety codes are extremely important. Not least the inverter MUST be able to detect loss-of-grid in the proscribed ways and shut down - or it could "backfeed" the grid and kill linemen. \$\endgroup\$ Jun 4 at 3:16

2 Answers 2

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Unfortunately there is no simple answer tho this question.

The best answer I can give, is to watch a recent video from Robert Feranec interviewing Rick Hartley about the complexity of PCB designs and grounding in particular.

https://youtu.be/vALt6Sd9vlY

Although this is about very high speed board designs, the same principles still apply.

In general it's better to have a solid ground but keep all the sensitive parts very well contained. Use adequate decoupling caps, and enough stitching with vias. In this case there is also high voltage on the board, so please be VERY sure to keep proper creepage and clearance distances, also with respect to ground! As well as standard isolation safety.

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This answer describes a solution implemented as a result of OWC's answer. It consititutes a practical solution based on the provided input.

OWC's answer and the referenced video on split vs continuous ground planes was exactly what I needed.

I'm using DGD2110S16 gate drivers

I have edited my design now as seen below to have a single ground plane. I have sorted out my clearances too. I have chosen to run 3.3v and gnd traces to the hall effect current sensors located to the right of the PCB. I think this will avoid noise compared to providing ground via the local ground plane...

enter image description here

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  • \$\begingroup\$ I think the clearance around the HV bus and pads/vias can be improved as well. \$\endgroup\$
    – OWC
    Jun 4 at 2:06

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