I want to use a totem pole BJT driver for a P-channel MOSFET. Various google searches brought me to the following circuit: enter image description here

In Olin Lathrop's answer to this question it is quite well described. pull-push gate driver for H bridge circuit

However during simulation of this circuit I found 1 issue, where (after excessive googling and reading SO questions / answers) I still cannot find the right solution.

The problem is the peak power during switching of the PNP transistor. The power dissipation between the NPN and the PNP BJT is not balanced and the peak is quite high (and the unbalance increases, with increasing voltages). During the transition / switching it reaches ~2.5 W for the PNP BJT and 600 mW for the NPN. Which is logic as the PNP emitter-collector voltage, is the full 36 V, when it is not conducting. Power of Q5 and Q6 I have just enough space to fit 2x SOT23 parts for the transistors and out of availabilty / cost reasons I would like to stick with some standard series, such as BC846 or the little beefier MMBT5551 (and ther complementary ocunterparts). Most of the SOT23 parts in below 500 mW power limit, while some are ~1 W power limit, but none are in the range of 2 W.

I would like to have fast switching transitions for the MOSFET M3.

The PWM / switching frequency is about 55 kHz.

So my question: Is there a smart way to reduce the peak power of Q6, without sacrificing switching speed?

Bonus question (in case I'm on the wrong track here): Am I trying, to make somethign work, that is not supposed to work, and I have to for example give up on the SOT23 requirement? Would another configuration / circuit be more suitable for what I want to achieve?

  • 1
    \$\begingroup\$ Do you need 2.5 W continuous power dissipation or just enough SOAR area for 2.5 W peak during switching? If the latter, you are looking at the wrong section in the datasheet. What gate current are you designing for? \$\endgroup\$
    – winny
    Jun 2, 2022 at 16:29
  • \$\begingroup\$ It;s only the peak power and not continouse. I have updated the plot of the 2 transistors power of an LTSpice simulation. So the SOA area for this peak, pulse would be enough. The problem is many (if not most) datasheet of these small transistors don't show and SOA graph (unlike many mosfets) \$\endgroup\$ Jun 3, 2022 at 8:23
  • \$\begingroup\$ @winny I'm designing the driver to drive the Mosfet gate to -10V $/V_{GS}/$ and a 80mm to 100mA gate current. (10V / 10Ohm ~ 100mA) \$\endgroup\$ Jun 3, 2022 at 8:26
  • \$\begingroup\$ That should be easy to do with SOT-23. How about FMMT493? diodes.com/assets/Datasheets/FMMT493.pdf \$\endgroup\$
    – winny
    Jun 3, 2022 at 10:07
  • \$\begingroup\$ Maybe, but how to determine the SOA for power? - nearly all datasheets either don't specify at all or on current basis. \$\endgroup\$ Jun 4, 2022 at 3:35

1 Answer 1



just change the zener to keep the VGS under VGS(max)

example: if VGS(max) is 20V, VGS(min) is 10V and your VCC is 36V, the zener should be between 16V and 26V.

also i advise to keep R1 lower, like 4.7k 1W.

a better solution is using a NMOS on the high side of the load and a controller like LTC7000 (under 10€)


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