KCL
Here's your re-drawn schematic (I'm in the practice of re-drawing schematics as a rule):
simulate this circuit – Schematic created using CircuitLab
My KCL sets up like this (treating your bottom node as ground):
$$\begin{align*}
\begin{array}{rccc}
{\text{KCL for node }V_a:}\vphantom{\frac{E}{R_1}+\frac{ v_c}{R_3}}\\\\
{\text{KCL for node }V_c:}\vphantom{\frac{v_c}{R_3}+C\,\frac{\text{d}}{\text{d}t}v_c}
\end{array}
&&
\overbrace{
\begin{array}{r}
\frac{v_a}{R_1}+\frac{v_a}{R_2}+\frac{v_a}{R_3}\\\\
\frac{v_c}{R_3}+C\,\frac{\text{d}}{\text{d}t}v_c
\end{array}
}^{\text{outflowing currents}}
&
\begin{array}{c}
&\quad{=}\vphantom{\frac{E}{R_1}+\frac{ v_c}{R_3}}\\\\
&\quad{=}\vphantom{\frac{v_c}{R_3}+C\,\frac{\text{d}}{\text{d}t}v_c}
\end{array}
&
\overbrace{
\begin{array}{l}
\frac{E}{R_1}+\frac{ v_c}{R_3}\\\\
\frac{v_a}{R_3}\vphantom{\frac{v_c}{R_3}+C\,\frac{\text{d}}{\text{d}t}v_c}
\end{array}
}^{\text{inflowing currents}}
\end{align*}$$
Above, I place out-flowing currents on the left and in-flowing currents on the right. That helps me keep things straight. As it turns out, a rising voltage at \$v_c\$ means an outflowing current (out from the node towards the capacitor) so that is placed on the left side. There is no inflowing current through the capacitor since ground can't generate any.
Solve the top equation for \$v_a\$ and substitute into the bottom equation (on the right side, of course.)
$$\begin{align*}
\frac{v_c}{R_3}+C\,\frac{\text{d}}{\text{d}t}v_c&=\frac{1}{R_3}\cdot\left[\frac{R_2\left(E \,R_3 + v_c\, R_1\right)}{R_1 R_2+R_1 R_3+R_2 R_3}\right]
\\\\
\frac{v_c}{R_3\, C}+\frac{\text{d}}{\text{d}t}v_c&=\frac{R_2}{R_3\,C}\cdot\left[\frac{E\, R_3}{R_1 R_2+R_1 R_3+R_2 R_3}+\frac{v_c\, R_1}{R_1 R_2+R_1 R_3+R_2 R_3}\right]
\end{align*}$$
The above, placed in standard form, results in:
$$\begin{align*}
\frac{\text{d}}{\text{d}t}v_c+\left[\frac{1}{R_3\, C}\left(1-\frac{R_1\,R_2}{R_1 R_2+R_1 R_3+R_2 R_3}\right)\right]v_c&=\frac{E\,R_2}{C\left(R_1 R_2+R_1 R_3+R_2 R_3\right)}
\\\\\text{applying values,}\\\\
\frac{\text{d}}{\text{d}t}v_c+\left[\frac{1000}{3}\right]v_c&=2000
\end{align*}$$
Solution using integrating factor
That's a 1st order non-homogeneous linear DE whose standard form looks like: \$y^{'}+a_t\,y=f_t\$. Of course, you just have simple constants there, so \$a_t=\frac{1000}{3}\$ and \$f_t=2000\$. The integrating factor is \$\mu=e^{^{\int a_t\:\text{d}t}}\$, which is just \$\mu=e^{^{\frac{1000}{3} t}}\$. So the solution is:
$$\begin{align*}
y_t&=\frac{\int \mu \,f_t\:\text{d}t+C}{\mu}
\\\\
&=e^{^{-\frac{1000}{3} t}}\cdot\left(\int \left[e^{^{\frac{1000}{3} t}}\cdot 2000\right]\:\text{d}t+C\right)
\\\\
&= e^{^{-\frac{1000}{3} t}}\cdot\left(2000\cdot \frac{3}{1000}\cdot e^{^{\frac{1000}{3} t}}+C\right)
\\\\
&=6+C\cdot e^{^{-\frac{1000}{3} t}}
\\\\&\text{as }y_0=0, \text{it follows that } C=-6, \text{so:}
\\\\&=6\cdot\left(1-e^{^{-\frac{1000}{3} t}}\right)
\end{align*}$$
(I used \$y_t\$ above as a substitute for the capacitor's voltage, \$v_c\$, over time.)
Solution using separation of parameters
$$\begin{align*}
\frac{\text{d}}{\text{d}t}v_c+\left[\frac{1000}{3}\right]v_c&=2000
\\\\
\frac{\text{d}}{\text{d}t}v_c&=2000-\left[\frac{1000}{3}\right]v_c
\\\\
\text{d}\,v_c&=\left[2000-\left[\frac{1000}{3}\right]v_c\right]\text{d}\,t
\\\\
\text{d}\,t &=\frac{\text{d}\,v_c}{2000-\left[\frac{1000}{3}\right]v_c}
\\\\\text{set }u=2000-\left[\frac{1000}{3}\right]v_c &\therefore \text{d}\,u=-\left[\frac{1000}{3}\right]\text{d}\,v_c
\\\\
t=\int \text{d}\,t&=-\frac3{1000} \int \frac{\text{d}\,u}{u}
\\\\
&=-\frac3{1000}\cdot\ln\left(u\right)+C
\\\\\therefore\\\\
-\frac{1000}{3}\,t+C&=\ln\left(u\right)
\\\\
Ae^{^{-\frac{1000}{3}\,t}} &= u
\\\\
Ae^{^{-\frac{1000}{3}\,t}} &= 2000-\left[\frac{1000}{3}\right]v_c
\\\\
-\left[\frac{3}{1000}\right]\left[Ae^{^{-\frac{1000}{3}\,t}} -2000\right] &= v_c
\\\\
v_c &=Ae^{^{-\frac{1000}{3}\,t}} +6
\\\\\text{find }A=-6\text{ at }t=0,\text{ so:}
\\\\
v_c &=6\cdot\left(1-e^{^{-\frac{1000}{3}\,t}}\right)
\end{align*}$$
Same answer.
KCL Addendum
The KCL equations show outflowing currents on the left and inflowing currents on the right. This approach is used by some Spice programs (those where I've directly looked over the code used to generate these) to develop their KCL.
Perhaps the easiest way to imagine is that a voltage at a node spills away from that node through the available paths. But also that voltages spill back into that same node from surrounding nodes through those same paths. The result is the application of a simple superposition concept that results in, effectively, the potential differences controlling the result.
You can test this, easily, by rearranging the resulting equation(s), moving the right side over to the left side and then combining terms. You'll then see the usual potential differences that you expect. So it really is the same result.
The reason I very much prefer this method is that it is simple to visualize and very difficult to make mistakes. You can easily orient yourself to a node and then work out the terms for out-flowing currents for the left side of the equation. Then all you have to do is position yourself at each surrounding node and work out the terms for in-flowing currents for the right side. It's almost impossible to screw that up.
Conversely, when you are instead struggling to work out the potential differences in your mind (using the more traditionally taught method) and just write those terms, you often find yourself not entirely sure if you have the sign right as you try and add them up. I find, time and time again that not only others wind up messing up somewhere and making an uncaught mistake.. but that I also make those mistakes, as well. Even with lots of experience, you just aren't 100% sure and you often find yourself double and triple checking your work, just in case.
This approach also just works and works right without the continual question about orientations of signing expressions. With this method, I still make typos. But I don't make sign errors. It's too easy to use.
So voltage spills away from a node via available paths and voltage spills into a node from nearby nodes via the same available paths. The only caveat is that a current source or sink can only flow in, or flow out, but not both directions. It's one way. So it will either appear on the out-flowing side or on the in-flowing side -- but not both sides.
This also works perfectly well with capacitors and inductors. It does turn the equation into a differential/integral equation. But that's just a technicality. It's still correct.