As a basis for a low power project, I want to render the useless machine not useless


A useless machine is a simple mechanism that powers up when a switch is closed, and then a mechanical arm moves to switch it back off. I want to apply this principle to my device waking up to do useful work only when a user interacts momentarily, and then completely shutting itself back off at a software determined time.

In principle I understand I can do this with a relay, and a momentary switch, the momentary switch would energize the circuit closing the relay, which would then connect the source to the remainder of the circuit until another action opened the relay.

I think that a similar sort of thing can work with an gated SR latch, except that it seems sequential logic circuits always need Vcc and ground to see if the clock signal has ticked. SN74LVC1G373

In principle then it seems that as long as I reset and then unlatch I should have a comparable result, but I'm not convinced that there isn't current leaking through the IC, whereas I know if I open a relay an absolutely negligible amount of energy is crossing the air gap.

I am still paranoid about the IC though. Is this the correct for going extreme low power, or have I missed something important and is there a better approach?

  • \$\begingroup\$ What kind of device do you want to wake up? How much power does it need? \$\endgroup\$
    – Jens
    Jun 6, 2022 at 4:32
  • \$\begingroup\$ The idea is sort of like an e-reader. So an EPD, and a low power micro-controller mostly in sleep mode. The longer between input the less responsive it gets until it eventually just dumps any important state information into storage and pulls power from the microcontroller. @Jens \$\endgroup\$
    – awiebe
    Jun 6, 2022 at 8:27

2 Answers 2


If you want to allow a microcontroller to turn itself off, this may help for a start:


simulate this circuit – Schematic created using CircuitLab

When the user activates the circuit with the button, the MCU must set an output STAY_ON to high before R1 has discharged C1. At any time later the MCU can set this to low to turn itself off again. In the "off" state there is only the leakage current of M1 and M2 (<= 100 nA typical).

The supply voltage is just an example, you may also switch an unregulated power supply.


CMOS logic, when static, and with the inputs at the correct logic levels (so at or near to supply or ground), takes essentially zero current.

If you read the data sheet for your proposed IC, you'll see that it specifies the supply current IDC as 10 μA maximum, over temperature to 85 °C. That generous figure of 10 μA is to allow for errors in their automatic test equipment, as well as the expected thousands-fold increase in leakage current when you go from room temperature to 85 °C. At room and modest temperatures, you would be hard pushed to actually measure any supply current for this device. In a battery-operated project, the battery self-discharge would be larger than the IC supply current.

If you're happy with the rails that IC can provide, 1.7 V to 5 V, then that is as good a solution as any other. 74HCxx is an alternative up to 5 V. If you need up to 15 V, then use 4000 series CMOS logic. If you want to go higher, or want an alternative to ICs, then build a discrete thyristor arrangement from a FET and another complementary device. Here is one implementation, though it's somewhat complicated as it includes the on/off logic, and an under-voltage lockout, but at its core it is a PFET thyristor arrangement.


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