I am using a Teensy 4.0 and an MCP23016 Port Expander (only I2C device) on my PCB.

  • I have 4k7 pullups to 3V3 on SDA & SCK.
  • SCK track is 77.9 mm long, 0.254 wide.
  • SDA 64.3 mm long, 0.254 wide.
  • I have 33 pF & 3k3 on the CLK pin.

The circuit works, but unreliably. As soon as a scope probe is connected to the SCK pin it is reliable.

I added as a mod a 4700 pF cap to the SCK pin and that works reliably, too.

What I don't understand is why, as there is no minimum capacitance only a maximum.

On another board of the same type I have 100 pF & 3k3 for the CLK RC as that was all I could find, this one works without the 4700 pF cap or scope probe.

Another strange observation is that we were testing for any relationship between temperature and reliability, so we had a hot air gun on minimum heat (~35 C) pointing at the port ex and when scoping the SDA pin we could see that the I2C message was changing. Move warm air away and it goes back to normal. Warm air back on and changing I2C messages again. This was very repeatable.

Took board off and visually inspected it and all pins were soldered well, no dry joints. It was a bit fluxy, so was cleaned several times with Flux-off. Still has the same issue.

The second board with the 100 pF cap for the CLK RC does show the same warm air effect but less often.

Why does the warm air make a difference?

I know I need to examine the I2C messages against the datasheet to make sure we're not on the edge of timings, and compare with and without the 4700 pF to see what effect it is having. Also slowing the speed down could help.

Any ideas what's going on?

  • \$\begingroup\$ Maybe try inverting the CLK signal and see if things improve or get worse. \$\endgroup\$
    – Andy aka
    Jun 7, 2022 at 13:31
  • \$\begingroup\$ What speed is I2C running (standard speeds are 100k, 400k)? 4700pf is a lot of loading capacitance. Are you probing with an attenuator probe of 1X or 10X ? \$\endgroup\$
    – glen_geek
    Jun 7, 2022 at 13:40
  • \$\begingroup\$ It's running at 400khz at present, 10x probe. \$\endgroup\$
    – smalljimmy
    Jun 7, 2022 at 13:44
  • \$\begingroup\$ You have a 3k3 series resistor in the line? Drop that to a much lower value - like 150 ohm or something, normally you don't need it at all. \$\endgroup\$
    – Arsenal
    Jun 7, 2022 at 13:53
  • 1
    \$\begingroup\$ "I have 33pF & 3K3 on the CLK pin." What is this supposed to mean then? \$\endgroup\$
    – Arsenal
    Jun 7, 2022 at 13:59

4 Answers 4


Is there a difference between the rise time of the SDA and SCL?

I2C is synchronous, so SDA is sampled when SCL reaches a threshold value. If SDA has a longer rise time than SCL, it may not reach the correct level before SCL causes the sample to be taken.

Adding C to SCL causes the sampling to be delayed slightly allowing more time for SDA to settle. I suspect this is will be a rising edge issue as both lines are passive pull-up and active pull-down.

Adding C may cause correct operation but is not resolving the root cause. If the rise times are different and large proportion of the bit period, then that should be addressed directly. This is why there is no min C spec - it should work best with no C loading. If the rise time is large compared to the bit period then consider decreasing the pull-up resistor value.


With tracks that short, there should be absolutely no need for any capacitance across the clock signal; if it is needed, then you are attemtping to mask another problem, which you should fix first.

For example, is the i2c clock rate comfortably less than the maximum 400k bit/s? Have you connected the MCP23016 clock generator circuitry as described in the data sheet? Maybe something (such as your power supply) is really noisy, and is flooding the board with interference. When you connect the oscilloscope, does the waveform look clean, or are there a lot of spikes?

Bear in mind that i2c is an edge-driven protocol, so any spurious edges will cause problems.

You ask why there isn't a minimum capacitance; it is because the answer is zero. Sort out the real problem, and you won't need any extra capacitance.


What I don't understand is why, as there is no minimum capacitance only a max.

In an ideal I2C world, an I2C bus would have no capacitance loading it at all. Bus capacitance is a hindrance to its operation, not a helpful necessity.

Therefore the I2C specs' state a maximum stray capacitance that the bus can tolerate while still operating. This capacitance is formed by the IC pins, PCB tracks and any connectors. On I2C, the specs' state different max. stray capacitances for different bus speeds: faster requires less stray capacitance.

The ideal value, the goal, for bus operation would be 0 F but that's not possible. So design for the least possible and certainly don't add capacitors. On some systems with off-board connections, small capacitor values are fitted to reduce noise susceptibility but don't do that unless its proven absolutely necessary.

Going beyond your statement on minimum capacitance, your operation fault will be caused by something else. Adding capacitors is not the solution, despite any apparent improvements you might see.

  • \$\begingroup\$ Thanks TonyM, I agree with what you are saying, but my circuit doesn't work reliably without the additional capacitance, and I don't know why this is? \$\endgroup\$
    – smalljimmy
    Jun 7, 2022 at 14:02

So after scoping the I2C signals and comparing to the port expander data sheet the timings were to blame, after changing these, one board works fine, I have not tested yet on the board that showed signals changing with warm air blowing on it. By increasing the clock speed of the port expander RC using the 100pF against the default 33pF, this made the timings closer and therefore it was more reliable.

Thanks for everyone's suggestions!


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