Since my previous question I've reduced the clock to 10kHz and am now trying to interpret what the pulses mean.
My reading of the image is 0b00110010
being transmitted. Which is exactly what I would have expected from this code.
const uint8_t address = 0x49 << 1;
const uint8_t tempr_reg = 0x00;
static char buf[12];
// Read 2 bytes, MSB first.
HAL_I2C_Master_Transmit(&hi2c1, address, &tempr_reg, sizeof(tempr_reg), HAL_MAX_DELAY);
HAL_I2C_Master_Receive(&hi2c1, address, buf, 2, HAL_MAX_DELAY);
Here is a zoom-in of the pulse.
Why is it 9 bits later instead of 8? Is the SDA low (between the red line and the SDA pulse) a slave ACK? If so, who holds SDA low during CLK==high after the 8th bit? Yet the pulse occurs after the ACK - I'm really confused.