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I'm getting familiar with QSPI on my STM32F746-Discovery (not really relevant for the question, just some context).

While reading reference manual, it lays out in details how the peripheral functions (insert rant over the peripheral being called QSPI and QuadSPI here). In every communication there is an instruction, address, alternate bytes, dummy and data phases. Some of them can be missing depending on specific operation.

When I operate a peripheral, I like knowing what every single bit in every peripheral register does and why, but I ran into an obstacle.

The only meaningful thing the reference manual provides about alternate byte is

enter image description here

Literally one sentence of very generic description. And the datasheet of the QSPI Flash has literally no information on alternate bytes suggesting they're not needed when interfacing with them. The very few QSPI examples that I found also do not utilize them.

I googled my fingers into blood trying to find any information on what the alternate bytes are and when they're used. They're barely ever mentioned on the internet, the only place I saw them was in STM32 MCU errata with some problem with dummy cycles where it suggested replacing dummy cycles with alternate byte phase. That's literally all I know about them. Which is nothing.

Question: what exactly is the purpose of alternate bytes in QSPI? When are they used, in what scenarios? What slave devices need them for what exactly purpose(s)? Some generic or specific example or explanation would be highly appreciated.

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    \$\begingroup\$ The controller will be designed to satisfy the requirements of the QSPI target ICs it might be connected to. Try looking at QSPI memory chip datasheets from different manufacturers and see what they need. You might find your answer for alternate byte uses/functions in there. \$\endgroup\$
    – TonyM
    Jun 17, 2022 at 10:26
  • \$\begingroup\$ If you look at the timing diagram it's just extra address/data (not like the electrons know the difference). I would guess one purpose is to have additional data not included in the data buffer, for example, if your memory chip uses a longer address than usual or needs an extra command byte, then you can put that in the alternate byte register instead of overwriting part of the data buffer. \$\endgroup\$
    – user253751
    Jun 17, 2022 at 10:29
  • \$\begingroup\$ it might also have a purpose in memory-mapped mode \$\endgroup\$
    – user253751
    Jun 17, 2022 at 10:45

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Main purpose of this feature is supporting high performance modes of some Flash memories. Brief description from ST is in AN4760 Application Note in section 3.1.3.

Section 3.1.3 Alternate-byte phase from AN4760

In S25FL512S Datasheet you can find brief description of this high performance mode and its purpose.

Description of high performance mode from S25FL512S datasheet

And example of transaction featuring Mode byte from the same datasheet.

Example of high performance transaction from S25FL512S datasheet

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