# Potential problems when using a high resistance voltage-divider

I want to design a circuit, that allows me to measure the voltage across a piezoelectric transducer.
The transducer itself has an impedance |Z| of 500 Ohms up to ~20 kOhms.
The voltage to measure ranges from ~5Vpp up to max. 400Vpp at frequencies from 20kHz to 50kHz.

On my planned PCB, I will use a 16-Bit ADC with a input voltage range of 0V to 5V. Hence, I will need to convert this high voltage signal down to the measurement range of the ADC.

As you can see on the above schematic, I am planning to use a simple voltage-divider that scales the input voltage down by a factor of 200 and has a high input impedance of 10MOhms (connected in parallel to the transducer).

The downscaled signal is then picked up and amplified by a factor of 2 with the instrumentation amplifier INA819, which has a high input impedance (GOhms), such that loading of the divider output is kept at a minimum.

The total gain of this circuit is then 1/100. The common mode input voltage range of the instrumentation amplifier is respected and at least in TINA TI simulation, everything seems to work fine and even the simulated measurement noise on the ADC is with ~10mVRMS (of the sensed voltage) pretty good.

However, I am afraid that especially the high resistances on my potential divider might cause some problems on the real circuit due to parasitic effects.

As an example:
The instrumentation amplifier datasheet provides data about the input capacitance, which is 1pF (differential) and 4pF (common-mode).
Could it be, that these capacitances in combination with the high input resistance act as a low pass filter for my signal? And if yes, how can I calculate or simulate this?

Of course, there will be other parasitic capacitances on my circuit because of the traces from the divider to the amplifier. To keep these at a minimum, I want to make the trace-widths as thin as the PCB manufacturer's standard-class allows it. Could it also be of advantage to remove any ground-planes below the dividers and the amp's input?

Are there other critical aspects that I miss?
Would you consider this circuit "good practice" for my kind of application or are there better methods available?

• The total error in your 3x3.3M$\Omega$ resistor string is almost 10k$\Omega$ so I think you are wasting your money on precision 50k$\Omega$ resistors. Commented Jun 23, 2022 at 21:52
• What about a charge amplifier in which the charge output from a piezoelectric sensor is converted into a voltage?
– user173271
Commented Jun 23, 2022 at 22:35
• The piezo acceleration can be measured with a C divider from the HV driver then it is low V and low X(f) Commented Jun 23, 2022 at 22:44
• even if |Z| is 500 ohms, I'd bet it's all capacitive. You will be better off with a fully capacitive divider, especially as you don't need to measure down to DC. Commented Jun 24, 2022 at 5:41
• @ElliotAlderson yes you are right. I selected this resistor precision because of the instrument amplifier's gain set (R13), which I would like to be precise. The rest is just BOM reuse and honestly I don't care to spare like 0.2\$ more on precision resistors, since this is just a first prototype
– Mau5
Commented Jun 24, 2022 at 7:18

The compensated divider as @Jens suggests is the way to go, but note that for (say) 1% error due to loading you need a parallel RC impedance of 2M$$\\Omega\$$ maximum if we assume that it's possible to have 20k$$\\Omega\$$ source impedance at 50kHz.

That would require a maximum capacitance of less than 1pF, which is fairly challenging and would certainly require the resistors to be very near the piezo.

More likely the output impedance is low at high frequency so you can go much higher in loading, but that should be verified. In other words, the source can be modeled as a voltage source with capacitor in series at its simplest.

You can distribute the capacitance, for example, 10pF across each 3.3M resistor will give you 3.3pF loading due to the caps, and then add a trimcap to make up the ~660pF across the 50K resistor (minus amplifier input capacitance). Then adjust the compensation with a square wave source as you would a scope probe.

simulate this circuit – Schematic created using CircuitLab

But the loading at 50Khz would significantly affect a 20K impedance source.

• I don't know why they do not teach compensated capacitors in undergrad. They mention capacitive dividers and resistive dividers but never using the two together. Commented Jun 26, 2022 at 18:50

The piezo acceleration can be measured with a C divider from the HV driver then it is low V , lossless and low X(f).

Then you may use it for Any purpose without interference.

If you used feedback, you could use that to stay at resonance rather than have to tune with unknown pF!!!

Then use a model for a 200:1 probe and scope RC impedance ratios for a flat response to >1MHz

Yes, you need a capacitive divider in parallel to the resistor divider. This example is a compensated 100:1 divider.

simulate this circuit – Schematic created using CircuitLab

The AC voltage calculation is

U2 = U1 * (C1 / (C1 + C2))

and it must match the DC divider for a proper frequency response. R1 is split up into several resistors in your application and you can do this with the capacitors as well.

The signal source has an impedance of 20 kohm and the bandwith is 50 kHz, so you can afford 20 pF as C1 and 2 nF as C2. The upper limit would be:

C = 1 / (2 * pi * 50 kHz * 20 kohm) = 159 pF

Making high impedance attenuators can be tricky. You need to keep the area under the high impedance components clear of any traces and planes to minimize capacitance. This may be problematic as external noise may couple in to your high impedance circuitry. If this happens, build a shield box around the sensitive area.

You need to do a frequency sweep of the system and see if you get the bandwidth you require. If you need more bandwidth, add a capacitor from the input (top of R8) to the output of the voltage divider (top of R12). This might be be in the sub-picofarad range which means using a gimmick capacitor (insulated wires twisted together). If the attenuation decreases at higher frequencies, add capacitance across R12.

Life will be easier if you lower the impedance of your attenuator to perhaps 1M input impedance. However, not knowing your driving source, you'll need to make that determination.

• Many thanks. Yes I will probably go down to 1M to make my life easier :)
– Mau5
Commented Jun 24, 2022 at 7:28

The professional solution of this problem, as @James said in his comment, is the so-called "charge amplifier". This circuit is specially designed to match piezoelectric sensors with amplifier inputs. Its main advantage is that it eliminates stray capacitance.

I have explained the basic idea behind this circuit in an intuitive way in my Codidact paper.

In essence, this circuit is a capacitive divider, in which the voltage drop across the output capacitor is destroyed with an equivalent voltage and this "mirror voltage" is used as an output voltage.

As a result of this cancelation, a virtual ground appears at the op-amp inverting input and the stray capacitance is virtually shorted.