Here's an image of the square wave to sine wave converter

This has been in my mind for a while now, I'm curious. Why not use a BJT H-bridge on the high voltage side, to convert the high voltage DC to AC. I saw a simple circuit that converts square waves to AC - it uses 3 capacitors and resistors. Why not take that signal and amplify it enough to drive the power BJTs of the H-bridge. That seems way easier than the current method, or am I missing something?

Overall, say you have mean to output a weak 50Hz pure sine wave, why not just drive a BJT H-bridge to create a pure sine wave inverter?

  • \$\begingroup\$ Can you show your proposed circuit? Tip: pay attention to proper capitalisation. It makes posts much easier to read. \$\endgroup\$
    – Transistor
    Commented Jun 24, 2022 at 22:05
  • \$\begingroup\$ I just added it \$\endgroup\$
    – BELSmith
    Commented Jun 24, 2022 at 22:08
  • 7
    \$\begingroup\$ Have you run the numbers on how much power will be wasted in those BJTs? Linear amplifiers are inefficient, often extremely so. \$\endgroup\$
    – Hearth
    Commented Jun 24, 2022 at 22:11
  • \$\begingroup\$ The schematic you've entered is a three-stage low-pass filter suitable (maybe) for an audio application or similar. OUTC < OUTB < OUTA as each stage will attenuate the signal. This would not be suitable for filtering mains power and there would be no output voltage regulation. \$\endgroup\$
    – Transistor
    Commented Jun 24, 2022 at 22:47
  • 1
    \$\begingroup\$ I have a friend who uses a 3000W (peak) audio amp in bridged mode to do exactly this when testing suspect electronics, so it's certainly a solution that does work. Listen to everyone about the efficiency though. \$\endgroup\$
    – Bryan
    Commented Jun 24, 2022 at 23:10

1 Answer 1


The overarching concern is efficiency. To avoid significant losses you would prefer to have no current with full voltage across the collector and emitter (transistor off), or full current and no voltage across the collector and emitter (transistor on). This requires operating the transistor in full off and full on, avoiding dwelling in the linear region in between. If you drive the base with a sinusoidal input, you are not avoiding the linear region very well. So a common approach is to use a pulse-width-modulated (PWM) input to the base. Then the transistor is fully on or fully off, but the duty cycle can be varied in a sinusoidal manner, resulting in an average voltage and an average current that vary sinusoidally, but without incurring unacceptable efficiency losses.

One good way to generate a PWM input whose duty cycle varies sinusoidally is to use a processor to increase an angle linearly and a trigonmetric function (sine) to convert this to a sinusoid. Then use the magnitude of the sinusoid to select a duty cycle. An easy way to do this is to equate the amplitude of the sinusoid to duty cycle 1. When the sinusoid goes negative, operate the other pair of the H-bridge. If the PWM frequency is too high to support ready calculation of the sinusoid in a timely manner, you can use a high-speed method such as the CORDIC algorithm in an FPGA, pipelining the hardware if you need very high frequencies of operation.

  • 3
    \$\begingroup\$ If you're running into speed limitations, I'd go to a microcontroller with a lookup table before an FPGA. \$\endgroup\$
    – Hearth
    Commented Jun 24, 2022 at 22:22
  • \$\begingroup\$ @Hearth Exactly, it's enough to store one quadrant of precomputed sine values,then just walk it forward, backwards,flip the sign and repeat. If you're okay with 8-bit resolution,then even with a 100 kHz PWM frequency you only need to store 500 bytes. Even the cheapest 8-bit microcontrollers will be more than enough for that. \$\endgroup\$
    – TooTea
    Commented Jun 25, 2022 at 7:35
  • \$\begingroup\$ In space applications memory is susceptible to bit errors caused by the impact of ionized particles. In such applications an FPGA with triple-bit redundancy can be used to obviate the need for expensive radiation-tolerant memories or elaborate bit-scrubbing routines or firmware. Of course, those FPGAs aren't cheap, either. \$\endgroup\$ Commented Jun 25, 2022 at 16:11

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