I have come across the RS flip flop & I have tried implementing that on a simulator & using actual logic gates. But I'm still not sure whether I have correctly understood the unstable or the forbidden case S=1, R=1 in the flip flop. Can anyone tell me what exactly is that?
By the way I have used 2-input NAND Gates to implement the flip flop. What is the difference between the NAND gate flip flop & NOR gate flip flop?