# How to filter out the switching noise from a DC/DC converter

I've set up a power supply using a MAX632 DC/DC Boost converter to bring up voltage from a small 4.5V battery, then I'm using a LM2940CT-5.0 linear regulator to bring it back to 5V, which the voltage the rest of my circuit is designed for:

simulate this circuit – Schematic created using CircuitLab

I wired the power supply according to the respective datasheets of LM2940 and MAX632:

• The 330µH inductor L1, and the C1 and C2 values are the same as in the typical application provided in the MAX632 datasheet.
• The R1/R2 voltage divisor and C3 are to adjust the Vout voltage, and also come from the MAX632 datasheet.
• C4 and C5 are the recommended values I found in the LM2940CT datasheet.

Everything works like a charm... on average: I've got the right supply even with a dying battery, but I also get a high frequency noise that comes from the switching converter.

## The question

How can I block this noise? Or, even better, is it possible to prevent the buck converter to produce it?

I found a possible duplicate of my question here, but there is no actual answer: How do I get rid of switching noise from these types of DCDC converters?

I work at home, so I'm looking for some good practice that I can apply without involving myself into some high technology nightmare that would led me out of my depth.

This is what the prototype looks like for the moment. I've highlighted the area where the DC conversion is:

## Noise measure

In the two pictures below, the yellow trace is measured at Vout and the blue trace is measured at Vreg:

• Picture one has a horizontal scale of 5us/div and shows the switching noise pounding at a rate of 10 us (100 kHz). The amplitude of the noise is the same in both measures, approximately 500 mV:
• Picture two shows the same two signals, but with a horizontal scale of 10 ns/div. The switching beats are ringing at a period of 1.5 horizontal divisions. At the selected scale this translates into a period of 15 ns (66 MHz) :

Of course, 66 MHz traverse the linear voltage regulator like if it was not there.

## Solutions that don't look good

I thought of two solutions, but neither seem doable:

• 1st solution - A low pass filter with a cut-off frequency around 5 MHz
• 2nd solution - A choke inductor of 66 MHz

Low pass filter

I could place a 4th order filter with twice a LC pair and a dampener after the second pair for this design:

simulate this circuit

Following R. Künzi Passive Power Filter procedure, if I base my design on available inductors like the B78108E1221M000, which has 220 nH, then I can obtain a cut-off frequency of 5MHz using capacitor values between 1nF and 10nF.

The inductor self resonant frequency is 610 MHz, well above the noise I want to cancel. This seems appropriate.

Capacitors of 10nF or less are available in COG dielectric, which is compatible with high frequency. However high, COG dielectric self-resonance is around 20MHz (see page 9, COG dielectric) which is below the noise frequency.

For the above reason, I don't believe this filter will cancel my noise.

A choke inductor

Much simpler than a low pass filter would be inserting a single choke inductor of the right resonant frequency like this one:

• AIAP-01-5R6K-T
• 5.6 µH Unshielded Wirewound Inductor 1.6 A 74 mohm Max Axial
• Self resonant frequency: 64 MHz

simulate this circuit

But... I've got the feeling that this 66 MHz is the outcome of some complex interaction between the input inductor of the boost converter, its internal switching scheme, and the output capacitors C1 to C4. So, I fear that placing a choke there would move the frequency to some other that can pass the choke.

Edit: Some comment suggest that the 66MHz frequency may also involve the other parasitic capacitances / inductances that are distributed everywhere in this very loose layout made out of wires. To verify it, I've replaced the load of the voltage regulator by a single 150ohm resistor, and left unpowered the whole circuit. This did not change the noise amplitude or the resonance frequency.

• Can you clarify where you connect your scope probes, both the positive and the negative, physically on the protoboard? Does anything change if you remove the probe from vout, both positive and negative? Jun 26 at 12:05
• You should work a bit on the layout. The switch node is quite large -> Input inductor should be as close to the IC as possible. Jun 26 at 13:00
• I would consider paying 15 or 20 dollars to have some PCBs made. That switching converter with no planes and wires looped everywhere is the worst case scenario for noise, and it's going to reduce the effectiveness of the linear regulator as well. Jun 26 at 16:28
• Forget about filtering until you have solved the elephant in the room, the breadboard. 100 kHz SMPS isn’t going to happen without a multilayer PCB with ground plane and sufficient decoupling. Jun 26 at 19:25
• Testing functionality and correctness of digital logic is reasonable but measuring noise is a little silly on perf board, and troubleshooting it is just a waste of time. I recommend looking at the advice about how to probe noise optimally, but do not bother ordering components or designing filters. Whatever you design will be wrong for the final PCB, and probably unnecessary given the LDO. If you still have problems after that, then you can troubleshoot them. Jun 27 at 13:37

## The Measurement Technique

As mentioned in the comments by some of the folks, the first thing I would make sure is appropriate is the measurement technique. Measuring power supply noise accurately requires a low-noise approach, for example, making sure that you don't create a large GND loop with the scope's ground clip—these switching frequencies can excite the ground loop inductance, so what you're seeing could actually be an artifact of the measurement technique.

So, I can think of two ways you could ensure a proper measurement technique:

1. Replace ground clip with a ground spring and probe at the node(s) of interest

2. Use a semi-rigid SMA coax cable (my preferred approach):

What I like about the coax cable approach is that it provides much better shielding from picking up stray noise that even the scope's probe with a ground spring would still pick up.

See below some plots I recently made when evaluating a DC-DC regulator—notice how the 50 Ω coax cable technique performed much better when trying to measure noise in the low mV range:

Even though I had my oscilloscope input in 50 Ω mode that is not necessary. At these frequencies, reflections should not be an issue. Plus 50 Ω input impedance means loading down your circuit, which may or may not be Ok.

## The Power Distribution Network (PDN)

The second point I want to make is that what you may be seeing could actually be due to your Power Distribution Network (PDN). The 66 MHz you are seeing could be legit, but it may actually be due to the long inductance, little decoupling you have along the path to the load. Here is a circuit model for a PDN:

The Voltage Regulator Module (VRM) is simply your DC-DC converter and the power propagates to the load, the PCB parasitic elements (L's and C's) play a role in the ringing/noise that you see. That is why from your regulator output to the load, you want that the combined impedance of the network be a small as possible to prevent ripple that will exceed the design requirements.

Typically when I see ringing in the tens of kHz to a couple hundreds (~200) of kHz, I would look at the DC-DC regulator first as the culprit and will try to optimize the loop response so that the voltage does not droop too much—in your schematic, that is the role of C3, it allows you to speed up the transient response at the expense of more ringing but of smaller amplitude.

When the ringing is in the MHz range, I would look at the bypass caps I have and will try to choose capacitor values that will reduce the overall impedance from the source to the load.

I believe that the problem you have is related to the long wires/paths in your circuit and they will for sure resonate at some frequency. Since you don't have a PCB with proper ground plane(s) for the return current to make it back to the source, it has to flow through a large area loop (i.e., more inductance).

References: App Note

I'll try to solve as many problems as I can before going to the first PCB.

Except... most of the problems you have are due to the assembly technique. It is entirely inappropriate for the application.

"Breadboarding" covers different techniques, and the one you chose just won't work for this. Switching converters, when breadboarded, must usually be "wireless", i.e. the components should be connected directly pin-to-lead, with leads cut as short as possible, and the current loops arranged to be small and not couple where they shouldn't.

If you insist on a hand-built breadboard prototype, you'll need to put it together on a piece of solid copper-clad laminate acting as a ground plane, use very short connections, dead bug (upside-down) construction, etc. Even then, there will be extra parasitics that a well designed PCB won't have - not even a 2 layer PCB.

Shown above is a breadboard of a relatively low-frequency circuit. The switcher and associated circuitry would be prototyped similarly, except:

1. The leads of discrete components have to be very short (unlike what's on the picture).
2. The power ICs - the switcher, and the LDO - should be glued upside-down on the copper.
3. The IC GND pins have to be bent down and connected directly to the copper ground plane.

The circuit you present is simple enough that a PCB can be laid out for it in a day, and you'd have it in your hands a week later, for not very much money. Whatever problems you'll be solving then will be related to the "final" design, in manufacturable form, and not to the vagaries of the inappropriate breadboard construction.

For switchers on a 2-layer PCB, using through-hole components, it is usually ideal to have a mostly uninterrupted ground plane on the top layer.

A passive lowpass is the correct way for this >= 100 MHz noise.

## How to realize it?

If you have some voltage to sacrifice after the boost converter, put an RC filter. Inefficient but reliable.

It will be more efficient by using a ferrite bead instead of the R. But pay attention to the DC current derating of the bead. There are dedicated power rail beads for this.

## Damping the filter

The self resonance of the capacitors doesn't matter. With the inductance between the converter and cap, it will shift to much lower frequencies of ~MHz.

If you make such an LC lowpass (with bead in series with the main inductor), it is important to use an RC damping branch though, as you did. Alternatively, use an aluminum electrolytic cap. Its ESR is a wonderful snubber for LC resonances in the range of ~MHz.

## Another note on your layout

All these dangling wires will couple HF everywhere. You must not use these on the HF nodes at all. Only use such wires after the passive filter described above and place the filter as close as possible to the converter output.

• have some voltage to sacrifice, so I can try all the solutions you propose. I need to order the inductors and ferrite beads. Jun 27 at 5:26
• @jmgonet like others have said, I would first recommend that you try to tidy your wiring a bit and add a separate sheet as a GND plane. Any filter will be a futile effort with so many wires going everywhere and picking up HF noise inductively. Jun 27 at 5:29

After receiving so many good answers, I started to test them all. This is my report.

## Input inductor should be as close to the IC as possible

(Comment by Lars Hankeln)

The inductor was definitively very far from the IC. Also others commented about my loose layout. So, first thing I removed all components, and placed them a bit more together:

New layout is similar to my original layout, minus all the dangling wires, plus the inductor much closer to the MAX632 chip, plus a star layout for power wires. Each module has a decoupling capacitor between power and ground. This schema gives a rough idea:

Then I measured again the noise as I did initially:

• With crocodiles to the ground.
• In Vout and Vreg nodes.

As many commented, this is a bad technique for high frequencies because Vreg and Vout are very large and because crocodiles have long wires. But I wanted to compare in the same testing conditions.

This is what I've obtained:

Scale is at 50mV per division, so the amplitude of the beating is 1/4 of initial amplitude.

Great.

## The measurement technique

This answer annoyed me because I don't care if I have 500mV noise over my 5V power rail, or if I have 250mV. I don't really care about having a numerically accurate value for my huge noise.

How wrong I was!

Fortunately, while I was working I saw a bit of wire on my table, and thought that I could at least check if there is any difference in measure. So I built this contraption:

And measured here at the capacitor guarding the input of the linear voltage regulator.

This is how it looks like on the board (notice that this is the same pin as the yellow trace / yellow probe in the previous measure):

And this is the result:

Wait... What? No noise?!

In fact, there is some noise, as the min / max numerical values at the bottom of the screen tell:

• Min 8.32V
• Max 8.64V

I switched to AC coupling so I could remove the 8.4V DC component, and then I zoomed in to obtain this other measure:

Measuring with the ground clip shows components that are completely invisible when using the crocodile clip:

• A low frequency triangle, (200µs / 5kHz) that looks like the result of MAX632 regulation mechanism.
• A higher frequency square (20µs / 50kHz) that looks like the switching frequency of the MAX632.
• High frequency noise that comes from... well... not sure from where, I guess that this is what I actually want to get rid off.

The linear voltage regulator gets rid of the two first components, but lets the noise through. This is another measure taken at the decoupling capacitor on the nearest module:

## What does the µP see?

The microprocessor has to perform AD conversions on voltages emitted by different analog probes. I thought that ringing beats on the analog lines are killing my precision. Or are they?

I took this measure between an analog input pin that happen to be in the immediate neighborhood of the ground power pin, directly on the micro-controller, with my new ground clip:

This is the measure:

The exponential capacitor recharge is because of the AD conversion, and is to be expected. There are some ringing beats here, but very small. This is another measure taken with smaller scale:

It's not huge, but still 60mV. For sure it affects somehow the AD conversion.

## There is sun outside

And then my wife came into the room, saw me with the curtains closed and the light on and told me:

• Why are you in the dark with the light on? There is sun outside, you know?

She opened the curtains, I switched off the light, and the ringing vanished:

My table lamp is one of those led rings with a magnifying lens. Great stuff for soldering, but a false friend in this occasion:

## And the noise?

With the source of the ringing identified, I came back obsessing with the noise. At this stage I'm having doubts about everything, so I shorted the ground clip to the tip of the probe. And there is the same 10mV noise. You can see it in the background.

## Conclusion

It turns out that the answer by big6 was the one with most insight: I was chasing ghosts looking at the beating.

Other learned lessons:

• Never before I gave much thought about what’s the Difference between EMI EMS and EMC and what they actually mean. In particular, this video gave me a lot of insight:
• The answers about making PI-filters with ferrite, or considering the capacitors for their low inductance value are good and valuable answers. And you can see them put in practice in the video above. But a breadboard has so many EMI / EMC issues that is not worth trying.
• Layout matters. Even with a breadboard, you can have worse and better layout. The star layout is definitively an improvement when using wires.
• Ground clip is a cheap and effective way of measuring signals. I'll use it from now on, when chasing interference.
• At first I haven't been systematic on my testing. I was in a hurry so I just went on trying things. I didn't take any notes so I could not compare new results with previous results and I could not reach any conclusion. Second time I was more careful, I planned the checks in advance, and I documented every measure. If you can't make it slowly, you have to make it twice.

Thanks to all people upvoting and answering my question. You really helped me a lot.

• Thank you very much for getting back with this outstanding summary. It is so useful, because it extends your learning hopefully to many others! Jul 10 at 7:14

There are two very good answers already which cover measurement technique (to make sure the noise is even really there and as bad as you think it is) and layout (keep those loop areas small!).

You will need to observe and follow the tips I’m both of those answers to get a good result.

But you seem to be asking what can be done circuitwise to reduce the noise.

For anything over 50MHz (sometimes even lower), there is a secret weapon that can often solve the problem all by itself.

These little ferrous nuggets of magic are often overlooked and in my opinion one of the most underrated circuit components. Don’t mistake these for inductors, for they are not. They have some inductance naturally, but their saturation current is so low that under even a little DC bias, they are barely inductive.

However, that ferrite core is engineered to have very high hysteresis and eddy current losses above a certain frequency. In other words, ferrite beads act as frequency-dependent resistors and will dissipate high frequency noise as heat. The actual power contained in these harmonics is usually quite small, so it won’t generate an appreciable amount of heat. But just like a linear regulator, burning the noise off as heat is the most effective way of removing it from a circuit.

Using a suitable ferrite bead just before the load (so after the LDO’s output), with 1-10nF of ceramic capacitance on either side of the bead (forming a pi filter) will clean up a large amount of the high frequency noise. And if there is still too much, just use additional beads in series. It is totally possible to achieve 1uVpp or less of noise, at least at frequencies above which the ferrite bead is effective.

# Do not use a low pass filter

…unless you fully understand the consequences for doing so in the context of voltage regulation.

Using a low pass filter on the output of a voltage regulator (linear or switch mode) will also and potentially severely degrade the load regulation and the transient response of a given regulator. In some cases it can even cause instability or oscillation.

You can use one tuned to the switching frequency to attempt to attenuate some of that ripple, but it is going to be more complex, burn more power, and likely be less effective than than a simple ferrite bead.

# RC Snubbers

…our last, best hope for silence.

This is a technique that can eliminate some of the noise at the switcher itself, but it requires access to the switching node, which as far as I can tell, is not pinned out on this regulator chip. So unfortunately this won’t be an option but it is also unlikely to be necessary. Do take the time to search this site for information on RC snubbers though, as they are extremely effective (but a with an efficiency trade off but usually a manageable one).

• Pin 4 of the IC is the switch node. Jun 27 at 19:21
• I've ordered some ferrite beads, plus some capacitors to perform the RC Snubber design procedure that I've read in several places like this application note: AN11160. I'm eager to experiment those two solutions. Jun 30 at 8:44

To get rid of these HF pulses, you need a filter.

A LC filter is a voltage divider: at high frequencies, L attempts to create a high impedance, and C attempts to create a low impedance.

The best inductive component for this is a ferrite bead. Inductors are optimized for low losses, and ferrite beads for maximum HF losses. This is what you want to turn the noise current into heat. In addition, ferrite beads usually have much higher

Make sure it's rated for and will not saturate at the DC current in your circuit. If it saturates, it'll lose its inductance and become useless. Consider a model rated for use in power lines (not signal lines) and an impedance of 100-300 ohms, that's usually specified at 100MHz. Then check the impedance plots to pick one with a wide impedance peak to filter a wide range of frequency. Here's an example.

Next you need a cap to ground. The self-resonant frequency of this cap is irrelevant. What matters is its inductance (including the layout) which determines its impedance at high frequency and therefore its ability to short the noise into ground. The more inductance the cap has, the higher its HF impedance, and the worse its ability to shunt noise to ground.

Since all SMD caps of the same size have the same inductance, then it depends mostly on size (smaller is better), and the answer in your case tends to be "a reasonably small package that you can hand solder like 0805, and several µF".

Capacitors of 10nF or less are available in COG dielectric, which is compatible with high frequency. However high, COG dielectric self-resonance is around 20MHz (see page 9, COG dielectric) which is below the noise frequency.

A C0G cap will have low loss, low distortion, low drift, etc, so it's a good choice if you make a filter to condition a signal. If you use X7R to filter a signal, it will suck (low accuracy, high drift, tons of distortion, high loss, etc). But for the problem at hand, these parameters are irrelevant, what matters is the inductance of the cap, and the X7R cap will have exactly the same HF behavior, with more capacitance. So it will be better around a few MHz. A physically bigger C0G cap will be worse than a smaller X7R cap. Therefore, X7R is preferable.

Here are a few examples with a random ferrite bead:

Green (top left): bead and 10µF 0805 X7R cap mounted over ground plane with 2 vias (2nH inductance). It's pretty good, -50dB between 1-100MHz for less than 10 cents.

Red (top right): the same with 10nF cap. The lower value of the cap makes the cutoff frequency much higher, and the resonance with the inductive ferrite bead much worse.

Green (bottom left): 10µF X7R in parallel with 100µF electrolytic having ESR of 1 ohm to tame the resonance peak. A good price/performance ratio.

Purple (bottom right): 10nF thru-hole cap, with a lot more inductance. Say it's mounted on perfboard instead of a PCB with ground plane. In this case, the very high inductance destroys the high-frequency performance.

So in order to filter that noise, you need a filter, which requires a cap with good HF behavior (ie, low inductance), which requires a SMD cap over a solid ground plane.

As the others have said, the perfboard construction around the DC-DC routes HF currents through long wire loops which emit lots of electromagnetic fields, which will couple into everything on the board. It is not possible to get rid of it, it has to be controlled at the source, by doing a solid layout on the boost chip over a ground plane.

If you don't feel like doing a PCB for the whole board, you can make a small one with just the boost chip, inductor, feedback, input/output caps, and filter.

• I think our answers say pretty much the same thing, but in contrast to my wall of text, yours has an image that says it all 😁 +1 Jun 30 at 16:29
• "The self-resonant frequency of this cap is irrelevant. What matters is its inductance (including the layout) which determines its impedance at high frequency and therefore its ability to short the noise into ground" - It makes so much sense, and I never thought it, I feel embarassed. I'm going to have a couple of busy weekends to explore all those solutions. Jul 1 at 11:13
• Hehe, yeah ;) Above SRF the cap becomes an inductor so its impedance increases. So the lowpass response stops going down. But that doesn't mean it goes up! It will only do so when the inductor also gives up. But there's still plenty of attenuation. It starts from the minimum impedance at SRF which is very low, then rises with frequency. So you get a good 1-2 decades above SRF where the impedance of the cap is still low enough to handle the noise. The most important thing is a low inductance connection (one on each side of the cap) to a low inductance ground plane. Jul 1 at 12:02
• For DC-DCs it's all about the layout. It's a synchronous boost so the chip will output square wave current into the VOUT pin. Say it switches 1A in 10ns (0.1A/ns). If you have a thru hole cap connected with wires with 100nH inductance on this current path, that's L di/dt=10V spike on the output. If it's a 5V chip, it's gone. If you use a 5nH thru-hole cap right across VOUT and GND, much better. If it's a 1-2nH SMD cap, even better. Jul 1 at 12:09