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I am using REF3033 to provide a voltage reference to AD7685. Twenty ADC chips are cascaded in a daisy-chain manner, as was guided in the datasheet. Can I use one voltage reference chip for all the ADCs? Will it affect the precision? If yes, to what extent?

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2 Answers 2

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If all ADCs use the same reference, then your channels will be better matched between ADCs. That eliminates the error source of having two ADCs with two references at slightly different voltages.

Your ADC has a typical reference current of 50µA (datasheet page 4). Multiply by 20, that's 1mA. That is well within the capabilities of the reference. You should also check its PSRR, especially at high frequency. Depending on the noise on 5V powering it, a ferrite bead in series with the 49R9 resistor could be an interesting option.

The ADC datasheet says:

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But is that one cap per ADC, or one cap for all the ADCs? Hmm...

The reference input on an ADC is not the REF pin. It is the voltage between REF and GND. Therefore, any voltage between the GND pins of your ADCs will add error. I'd recommend to place them all over a solid ground plane (no cheating by putting traces in it) and to make sure no high current from a nearby switching converter or whatever flows into that ground plane. Likewise, the output of the reference is not the REF pin, it's the voltage between REF and GND. So, for layout, it would seem better to put the reference in the middle of the bunch of ADCs, on the same ground plane, to make sure all the GND pins are at the same potential.

If REF is distributed with a trace, its inductance could add unwanted error voltages, so that would need more decoupling caps. If you use 4 layers, perhaps you could use a thick trace or small copper pour.

Personally I would stick 100nF X7R MLCC on the VCC pin and the REF pin of each ADC. If REF is routed with a long skinny traces, maybe add 1 ohm in series with the cap. Otherwise, if it's a low inductance wide pour, probably not.

Now the reference's datasheet gives its output impedance, along with a warning about low-ESR capacitors (page 8).

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This corresponds to an output impedance of 20mOhm+64µH. The opamps in these micropower references are not that fast. This is easy to simulate, and that predicts a huge problem with a 10µF MLCC output cap (blue) which is solved by adding an electrolytic (470µF, 1 ohm ESR). Here the output impedance is plotted, by putting an "AC 1" current source at the output, it shows a result in ohms directly.

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Having a spike in the output impedance of the reference means it will ring if excited at that frequency. Even if no signal is present at that frequency, noise will be amplified in the corresponding band.

The ADC datasheet suggests using low offset opamp AD8605 as reference buffer, so why not.

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The one on the top right (green curve) is quite simple and provides a low output impedance, and no ringing with the decoupling caps. Note the 1.5µF cap represents the 20 100nF caps in parallel. It still needs an electrolytic (suggest Panasonic FR 470µF 6.3V) with a bit of ESR to match the opamp with the low ESR ceramic caps. Ferrite bead may or may not be necessary. Make sure to mind the PSRR of the opamp and what it is powered from.

Using an opamp means a filter can be used on the reference output, to get rid of high frequency noise. That should remove about 1LSB worth of noise, so it's not really spectacular.

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This is rather usual. Just check how much current the AD7685 needs at the REF pin and how much the REF3033 can provide. If it doesn't pan out, you might need another buffer after the REF3033.

Will it affect the precision?

Yes, but minimally so. The reference current demand of the ADC varies with its input voltage typically. This is given in A/V somewhere. Then the reference itself has a load regulation rating in V/A.

Multiplying these two numbers gives you a crosstalk rating between the ADCs. However, typical values are very small < 1e-6.

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