Why is so much current going from base to collector?

I built this circuit (with transistor $$\\beta = 100\$$) and my result (when simulating with Falstad) is 2.582 mA through AM1 and 258.206 mA through AM2 (towards the negative side of the battery), in particular, even more current leaves the collector (in the wrong direction) than the emitter. The results are somewhat different when simulating with CircuitLab.

Why doesn't the transistor block current from the base to the collector? It this not what a transistor should do? How can I prevent this behaviour?

simulate this circuit – Schematic created using CircuitLab

• This is not a typical way that I'd expect a BJT to be hooked up, and you just have two forward-biased junctions - what were you expecting it to do? Commented Jul 6, 2022 at 14:35
• What do you expect to happen? The base-collector junction is a diode. Commented Jul 6, 2022 at 14:36
– Null
Commented Jul 6, 2022 at 15:23
• Where's VCC or VEE? Where's emitter or collector resistor? I have no problem with learning by doing, but you appear to be trying to reinvent the wheel. It may be better for you to do a little research before experimenting. Commented Jul 6, 2022 at 18:35

Look at the transistor as two PN junctions closely bonded: -

Image from here.

As you can see, the base to the emitter is a PN junction and so is the base to the collector. Hence they are both forward biased diodes when you have them connected as you describe. And, the reason why the collector current is so much higher than the emitter current is because of the different doping levels in collector and emitter respectively.

Why doesn't the transistor block current from the base to the collector?

As explained above.

It this not what a transistor should do?

It's what a BJT will do when you connect it as shown.

How can I prevent this behaviour?

Don't operate the transistor like this; find a different way of fulfilling your circuit needs; maybe use a MOSFET but, nobody can really advise you because nobody knows what you are trying to achieve.

I built this circuit with Falstad

I was hoping that would shed some light on what you are trying to do but there was only 2 resistors, an inductor, a capacitor, a switch and a battery to observe i.e. no transistor.

You’ve got two somewhat different, forward-biased diodes going out from base to the current meters. Since the diodes are different, they don’t share the current equally. The collector area on planar transistors is much larger than the emitter area IIRC, so the BC diode is expected to conduct better - as you observe. The transistor model captures that. I get similar behavior with a 2N2222 on a breadboard.

Transistor action doesn’t occur since both diodes are heavily forward-biased.

simulate this circuit – Schematic created using CircuitLab

Per Wikipedia, the Ebers-Moll equation for $$\I_C\$$ is

$$I_C=I_S[(e^{\frac{V_{BE}}{V_T}}-e^{\frac{V_{BC}}{V_T}})-\frac{1}{\beta_R}(e^{\frac{V_{BC}}{V_T}}-1)]$$

When the collector and emitter are at the same potential, $$\V_{BE}=V_{BC}\$$ so the Ebers-Moll equation for $$\I_C\$$ reduces to

$$I_C=-\frac{I_S}{\beta_R}(e^{\frac{V_{BC}}{V_T}}-1)$$

By similar reasoning, when collector and emitter are at the same potential, the equation for $$\I_E\$$ is reduced to

$$I_E=\frac{I_S}{\beta_F}(e^{\frac{V_{BE}}{V_T}}-1)$$

The ratio between $$\I_C\$$ and $$\I_E\$$ is then found to be

$$\frac{I_C}{I_E}=-\frac{\beta_F}{\beta_R}$$

where $$\I_C\$$ and $$\I_E\$$ are taken in their usual direction, or

$$\frac{I_C}{I_E}=\frac{\beta_F}{\beta_R}$$

where $$\I_C\$$ and $$\I_E\$$ are both taken as currents flowing out of the device.

That is, the base-collector and base-emitter junctions act like a pair of forward biased diodes in the circuit in question with the base-collector diode conducting a larger current, approximately by the proportion $$\\frac{\beta_F}{\beta_R}\$$.

When simulated with Falsad, using a $$\\beta\$$ value of 100, the $$\\frac{I_C}{I_E}\$$ ratio works out to almost exactly 100.

When simulated with CircuitLab, using a 2N2222 model, with a $$\\beta_F\$$ of 100 and a $$\\beta_R\$$ of 5, the $$\\frac{I_C}{I_E}\$$ ratio works out to 114.8/81.36 = 1.411 which is quite far from the prediction of 20. This suggests that CircuitLab uses a model other than Ebers-Moll. By modifying the values of Rc and Re in the CircuitLab model for the transistor, it becomes clear that the division of current between emitter and collector is highly dependent on the internal resistances of the transistor, and not so much on the ratio of $$\\beta_F\$$ to $$\\beta_R\$$. I thus suspect that the CircuitLab result is closer to reality than the Falstad result.

**The best ability to block collector current is from reducing the Vbe <0.5V towards 0 or removing the power source from the collector.

Ic is an exponential Vbe voltage-controlled current sink, Ic from some power source, until it saturates (Vce= ~0 where hFE reduces by default Ohm's Law and the bulk Rce collector-emitter resistance.** The emitter is a summing junction of Ie=Ib+Ic.

other

Rb is your current limiter Vbe=0.7 . Choose wisely using a resistor divider with Thevenin Req to limit current and thus voltage drop and choose Veq just above Vz for that voltage drop. The draw includes load R variations.

Ic = 0 because there is no power source with a load to collector on schematic yet I guess you had V+ on collector in Falstad with default beta or hFE=100 and didn’t know how to change that to 10 or 10% if you were operating in saturation

I built this circuit with Falstad (with transistor β=100) and my result is 2.582 mA through AM1 and 258.206 mA through AM2

Your Falstad Export Link is missing and the schematic cannot possibly match your schematic here. You can do screenshots and edit/crop from Falstad in your browser. (I hope) Then you do not need Circuit Labs.

Yet Circuit Lab shows 0 mA and yet no supply on collector so Ic=0 is correct, but Ib+Ic=AM1=0 (not running)

• Ic will not be 0. Down voted. Commented Jul 6, 2022 at 20:23
• CircuitLab shows the expected high collector current if GND is added to the circuit
– Jens
Commented Jul 6, 2022 at 21:34
• Ok @Jens so why does cct lab not support my mobile for editing Commented Jul 6, 2022 at 23:00
• @MathKeepsMeBusy explain how Ic is not 0 in schema shown with no Power Commented Jul 6, 2022 at 23:01
• Apply Ebers-Moll equation for Ic when Vbe=Vce. You get lc= -Is(e^(Vbe/Vt)-1)/beta_r (unless I am mistaken). Commented Jul 6, 2022 at 23:16