# Digital Potentiometer LTSpice Model

I'm looking to simulate a circuit in LTSpice which uses a U/D-style digital potentiometer like the Analog Devices AD5220. Is there an existing component model with this type of functionality?
If not, what are other methods I could use to model a pulse-controlled variable resistor in LTSpice?

You can use a behavioural resistor approach with one of int(), round(), ceil(), or floor(), but you should take care of the discontinuities, to avoid .TRAN hiccups:
To show that you can have any kind of variation, I've added the f(x) definition, but note that, while the function is f(0)=0 and f(1)=1, the extremes will not play nice with the solver, so I've made sure that the steps are N-1, with an offset of 0.5/N. The Rpar, Cpar form a time constant for a sufficiently small variation, but enough so that the discontinuities are taken care of, while tripdv, tripdt tell the solver to be thorough whithin a change of tripdv V / tripdt s, and discard the tight timestep elsewhere (e.g. try to preserve the edges while not encumbering the simulation). The T is just to give you an idea for the duration of the controlling voltage: since f(x) is meant to be used within the interval [0,1], if you simulate it for T seconds then you need to adjust its period.
Now, you're saying that you want a "pulse controlled" resistor. If you mean that you want to implement a whole "digital" protocol, sure, your time, your money, but I'd go for a behavioural approach: what you're reall after is the behaviour of the variable potentiometer to such a discretized approach -- the protocol is just part of the "details". For this, though, you could add a bit of complication with a counter, or even make a digital counter with [Digital]/dflop and then a DAC (behavioural or not) but, personally, I fail to see the relevance. Your choice.