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This schematic from righto.com's article on the register of 8086 shows a bi-stable latch with inverters.

When the read line is set to high, and the inverter output is also set to high, the bit line has a closed circuit to ground, and is set to low, I assume.

This means that it should be at logic high otherwise, and it seems that would be done with a pull-up resistor.

enter image description here

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    \$\begingroup\$ This sounds like an interesting question, can you summarize the ask in a single sentence at the end, probably starting with a “How” or “Why”? \$\endgroup\$
    – Bryan
    Jul 19 at 18:12

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It is much more likely that the bit line is precharged to a high voltage before the Read line is asserted, and allowed to float for the short time that it takes to read the cell. The bit either leaves the bit line floating high or pulls it low.

An actual pullup resistor will dissipate dc power whenever the bit line is low, which is a disadvantage. Furthermore, creating high-value resistors requires a lot of silicon area in a conventional digital manufacturing process.

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  • \$\begingroup\$ Thank you. That makes sense, would never have thought of that explanation myself. Was easy now to search more info on precharging bitlines for memory cell. \$\endgroup\$
    – BipedalJoe
    Jul 19 at 19:24

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