I have a small PCB, 6mm by 16mm with 6 layers. There are LVDS SPI signals (4 pairs) on this PCB, but due to the density and size of this board, it was difficult to have a reference plane under the SPI signals which are the only differential LVDS pairs on the board.

Does the size of the PCB mean not having a reference plane will not affect the signal integrity, or will it still be a concern regardless of the PCB size?

  • 2
    \$\begingroup\$ What edge rates, speeds are we talking about? Usually SPI means quite low speeds, 10s of MHz max and tends to be single ended, but LVDS is used up to 100s of MHz and is differential. As long as an LVDS diff pair has the correct diff impedance, there's no need for a reference plane. However, that diff impedance is frequently realised by using two single-ended lines to a ref plane, each with half the diff impedance. With max dimension 16 mm, a line of the wrong impedance that short may not matter for slow enough signals. \$\endgroup\$
    – Neil_UK
    Aug 1, 2022 at 11:14
  • \$\begingroup\$ The differential SPI uses 24MHz, I made sure the trace lengths are matched but as you mentioned, manufacturing them and guaranteeing impedance matching of 100 ohms will be difficult without a reference plane \$\endgroup\$
    – Shannon
    Aug 1, 2022 at 11:36
  • \$\begingroup\$ For co-planar, edge-coupled differential pairs, the differential impedance is mostly set by the spacing, or coupling between the individual traces and a reference plane. There is very little coupling edge-wise between such traces. That's why if difficult to get 100 ohm diff impedance with such a configuration. \$\endgroup\$
    – SteveSh
    Aug 1, 2022 at 13:21

1 Answer 1


On the small PCB, the signal integrity of SPI indeed should be good enough. But that's something you should ultimately measure, in absence of EM analysis tools that would let you convert the layout to a lumped-component equivalent circuit that could be simulated in SPICE.

Discussion of signal integrity without ability to measure and confirm/disprove your assumptions is a sure way to waste time. On any digital design, at the prototype stage you will want to take a look at all digital signals and their integrity, just to make sure your mental model matches the reality.

I'd be concerned about coupling from SPI to sensitive analog nodes if you got any. Make sure there's some shielding between the two.


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