Analog signal conditioning circuit selection for STM32F2 microcontroller ADC inputs

Question

This is my first time designing an analog signal conditioning circuit for ADC inputs.

The card will have up to eight analog inputs connected to eight STM32F207ZG ADC channels (stm32 mcu datasheet).

The microcontroller ADC channels are 12 bit. It means 4095 level steps. Result could be saved left or right aligned in a 16bit register.

Every analog signal is up to maximum voltage Vmax = 10V to minimum voltage Vmin >= 0V.

I was searching for information, theory and examples for doing this. I have seen several options, but I'm not sure which one could be the best.

I know I need to reduce Vmax to ADC Vref maximum = 3.3V and Vmin to 0V (when no offset is present). A voltage divider could help with it. Furthermore it is needed to keep input circuits impedance effects away from ADC input. Follower op-amp could also help with it.

I have selected the 3 more interesting ideas for doing this, based on voltage divisor and op-amps.

1. Some one uses a voltage follower op-amp with the analog input signal connected to the non-inverting terminal. A voltage divider is connected to the output op-amp. This author puts a parallel Zener at the output node, before the ADC input.

2. A subversion way uses another voltage follower op-amp instead of Zener diode.

3. Some other one uses a voltage divider connected to the non-inverting follower op-amp terminal. Its output is directly connected to the ADC input.

When the circuit needs an offset some authors suggest a way for adjusting it with a potentiometer in a voltage divider:

With Vref connected to the substract op-amp:

If my analog voltage has a range from 1V to 9.5V (not exactly from 10V to 0V) I know how to reduce the maximum value and how to create an offset voltage. At first I didn't know how to join these two circuits, but I have realised that I have two solutions:

1. Using a substract op_amp with R1=R2=R3=R4 I could get a gain = 1 substract (Vin - Vref) operation but I would need:

• op_amp with negative voltage
• 2 voltage divider: for voltage reductor and for offset generation
• two follower op_amp (maybe less): one is connected to one voltage divider and the other one to the adc input pin

2. Don't connect an offset voltage and to work as if the offset doesn't matters (as in circuit number 2). Of course it will miss a part of the whole ADC travel, it's said some of precision. I have done some calculations and the system could allow this precision missing. Hence, I will need:

• two voltage divider
• two follower op_amp (maybe less)
• no negative voltage --> it could be powered by single supply

My questions refered to both solutions:

1. Can the first and second solutions be optimized reducing/saving some of the components (especially op-amps)? I'm not sure if the 1M ohm resistor -from sensor circuit- would help to stop current and acting as a barrier between two parts -I have read a way for saving them could be using resistors with much bigger values than the first ones when connecting two circuits like these-
2. At second circuit what thing is better: to connect a follower op-amp to the adc input pin or to connect the zener diode instead (one of the above proposal)?
3. Could the substract op_amp bei powered by a single supply and not use a negative voltage? so connecting GND to the negative supply terminal. What about follower op-amp? Can they work negative pin sourced by GND instead of negative voltages (two both circuits)?
4. If it is not too much to ask for, I would like also ask for which op-amp (how to choose one device for my application) you would use.

More information about analog signal nature (origin):

PS732 feinmetall 3 terminal sensor:

The 3 sensor terminals are shown in the circuit connection:

Only Vout is the input signal on my design card:

How are the sensors powered? Power comes from an external power bank that is feeding the system cards.

Manufacturer ADC input specifications:

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I think I could answer some of my questions:

1. I still not knowing if too much bigger resistor values would be enough to remove the first opamp. But a follower opamp can work instead.

2. @Jens has given some sense answer:

"A zener diode is not neccesary here and would not help if the MCU has no supply. If you want to reduce the current in the internal protection circuit of the ADC in this scenario, you can further rise the resistor values (e.g. 47 kohm : 22 kohm). The datasheet allows up to 5 mA there and this divider is far away from that (< 0.6 mA)."

3. Some op-amp work with single and dual supply. Other ones work with single supply. This is specified by manufacturer. If analog signal doesn't travel towards negative values, negative supply could be replaced by GND. So, I don't need negative supply.

4. I know that op-amp for audio signals needs quick response: high slew rate and high bandbwidth. This is not my case. But I'm not sure about nature of our analog signals. Sensor is a little bar with an internal resistor that changes its value according to mechanical elongation. So I have chosen a device that is suggested for testing, measuring and instrumentation purposes:

https://es.farnell.com/on-semiconductor/mc33074dr2g/amplificador-opera-4-5mhz-13v/dp/2531392

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I'm planning to carry out this solution:

I still having two doubts: about schottky diodes adding, and the second opamp adding. Maybe both devices are not needed here. But being the sensor signal comming from external card using different voltage rail I think they (s. diode) provide a needed protection. Schottky connection is a manufacturer advice for avoiding this kind of risk.

Do I need second opamp? If ADC input impedance (RADC) is 6K, maybe I only need to connect greater voltage divisor resistor values, nearly 50K (as datasheet suggests for external impedance RAIN) instead the second opamp.

Do I need schottky diodes?

Answer 1

I would use the first schematic you presented with some modifications:

1. You need a 2:1 divider for the ADC reference voltage. Normally I would leave some headroom for the ADC and use a divider of 2.2:1 just in case the 10 V input range is not exact.
2. You don't need so much current in the divider because you are sampling very slow input voltage changes. The LM358 might not even provide it at 10 V output. 22 kohm for R5 and 10 kohm for R7 are ok here.
3. A zener diode is not neccesary here and would not help if the MCU has no supply. If you want to reduce the current in the internal protection circuit of the ADC in this scenario, you can further rise the resistor values (e.g. 47 kohm : 22 kohm). The datasheet allows up to 5 mA there and this divider is far away from that (< 0.6 mA).
4. C5 is important to hold the voltage during the aquisition phase of the ADC. Don't use values below 10 nF in this circuit.
5. You implemented a 1 Mohm pulldown resistor (R11) in your schematic to define a close to zero reading at open input. This is a good idea, but introduces a small linearity error because it is a load for the potentiometer. At mid point wiper position the error is around 13 mV and your ADC would see this. So 10 Mohm is big enough to avoid this problem here with the drawback that the input bias current of the OpAmp will produce a slightly bigger offset voltage at open input.
6. You have two reference voltages here, the more or less exact 10 V of the linear regulator - voltage drop across 1 kohm, and the 3.3 V reference of the MCU. You should consider to measure the 10 V or 12 V point of the potentiometer supply with a separate ADC and to interpret the measurements of all channels relative to this value to improve the accuracy.
7. Verify, that the LM358 can follow the maximum potentiometer voltage at the output with a 12 V supply. Another OpAmp with rail to rail output would be on the safe side.