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This is my first time designing an analog signal conditioning circuit for ADC inputs.

The card will have up to eight analog inputs connected to eight STM32F207ZG ADC channels (stm32 mcu datasheet).

The microcontroller ADC channels are 12 bit. It means 4095 level steps. Result could be saved left or right aligned in a 16bit register.

Every analog signal is up to maximum voltage Vmax = 10V to minimum voltage Vmin >= 0V.

I was searching for information, theory and examples for doing this. I have seen several options, but I'm not sure which one could be the best.

I know I need to reduce Vmax to ADC Vref maximum = 3.3V and Vmin to 0V (when no offset is present). A voltage divider could help with it. Furthermore it is needed to keep input circuits impedance effects away from ADC input. Follower op-amp could also help with it.

I have selected the 3 more interesting ideas for doing this, based on voltage divisor and op-amps.

  1. Some one uses a voltage follower op-amp with the analog input signal connected to the non-inverting terminal. A voltage divider is connected to the output op-amp. This author puts a parallel Zener at the output node, before the ADC input.

only one follower op-amp

  1. A subversion way uses another voltage follower op-amp instead of Zener diode.

2 follower op-amp version

  1. Some other one uses a voltage divider connected to the non-inverting follower op-amp terminal. Its output is directly connected to the ADC input.

divisor connected to the voltage follower input

When the circuit needs an offset some authors suggest a way for adjusting it with a potentiometer in a voltage divider:

enter image description here

If my analog voltage has a range from 1V to 9.5V (not exactly from 10V to 0V) I know how to reduce the maximum value and how to create an offset voltage. At first I didn't know how to join these two circuits, but I have realised that I have two solutions:

  1. Using a substract op_amp with R1=R2=R3=R4 I could get a gain = 1 substract (Vin - Vref) operation but I would need:

  2. op_amp with negative voltage

  3. 2 voltage divider: for voltage reductor and for offset generation

  4. two follower op_amp (maybe less): one is connected to one voltage divider and the other one to the adc input pin)

  5. Don't connect an offset voltage and to work as if the offset doesn't matters (as in circuit number 2). Of course it will miss a part of the whole ADC travel, it's said some of precision. I have done some calculations and the system could allow this precision missing. Hence, I will need:

  6. two voltage divider

  7. two follower op_amp (maybe less)

  8. no negative voltage --> it could be powered by single supply

My questions refered to both solutions:

  1. Can the first and second solutions be optimized reducing/saving some of the components (especially op-amps)? I'm not sure if the 1M ohm resistor -from sensor circuit- would help to stop current and acting as a barrier between two parts -I have read a way for saving them could be using resistors with much bigger values than the first ones when connecting two circuits like these-
  2. At second circuit what thing is better: to connect a follower op-amp to the adc input pin or to connect the zener diode instead (one of the above proposal)?
  3. Could the substract op_amp bei powered by a single supply and not use a negative voltage? so connecting GND to the negative supply terminal. What about follower op-amp? Can they work negative pin sourced by GND instead of negative voltages (two both circuits)?
  4. If it is not too much to ask for, I would like also ask for which op-amp (how to choose one device for my application) you would use.

More information about analog signal nature (origin):

PS732 feinmetall 3 terminal sensor:

position/presence sensor schem-datasheet

The 3 sensor terminals are shown in the circuit connection:

complet circuit for one sensor

Only Vout is the input signal on my design card:

scheme for one sensor

How are the sensors powered? Power comes from an external power bank that is feeding the system cards.

pwr scheme

Manufacturer ADC input specifications:

adc specs RAIN

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    \$\begingroup\$ Note that your third circuit does not solve your problem as it is an amplifier and not capable of a gain smaller than 1. \$\endgroup\$
    – Arsenal
    Aug 1 at 14:35
  • \$\begingroup\$ Yes, I know it. So, for sure it needs to be improved, modified or being finally discarded if there is no way for get a complete solution. I put it as an example of 3 most popular solution for adc signals conditioning I have seen through my search. Maybe I should edit the post and point this. Thanks. \$\endgroup\$
    – Suvi_Eu
    Aug 2 at 5:33
  • \$\begingroup\$ this needs more info. The output impedance of the source is needed to know whether or not an op amp is needed for buffering. If the source is low output impedance, maybe it is not needed. Note that very often some low pass filtering and protection will also be needed though. You need to give more info about the application and specific devices you are connecting together before an informed opinion can be given. \$\endgroup\$
    – danmcb
    Aug 2 at 7:47
  • \$\begingroup\$ The only thing I know about analog signal is that it comes from position sensor based on potentiometer.. I haven't chosed ap-omp yet. First I would like to find a proper strategy for reducing and optimize the total voltage range. ADC input is the ADC channel from the micocontroller mentioned above in the post. I'm just searching for more info about the sensors. I think the sensor is a voltage divisor formed by variable resistors, but then some R = 1M (even higher) is connected in paralel with the output for keeping high impedance. I will put that on the post as soon as I find. Thanks. \$\endgroup\$
    – Suvi_Eu
    Aug 2 at 11:01
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    \$\begingroup\$ How is this +10 V supply of the potentiometer stabilized? I assume you want to measure the potentiometer wiper position, but you have two references here. One is the +10 V, the other is the ADC reference. \$\endgroup\$
    – Jens
    Aug 3 at 14:41

1 Answer 1

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I would use the first schematic you presented with some modifications:

  1. You need a 2:1 divider for the ADC reference voltage. Normally I would leave some headroom for the ADC and use a divider of 2.2:1 just in case the 10 V input range is not exact.
  2. You don't need so much current in the divider because you are sampling very slow input voltage changes. The LM358 might not even provide it at 10 V output. 22 kohm for R5 and 10 kohm for R7 are ok here.
  3. A zener diode is not neccesary here and would not help if the MCU has no supply. If you want to reduce the current in the internal protection circuit of the ADC in this scenario, you can further rise the resistor values (e.g. 47 kohm : 22 kohm). The datasheet allows up to 5 mA there and this divider is far away from that (< 0.6 mA).
  4. C5 is important to hold the voltage during the aquisition phase of the ADC. Don't use values below 10 nF in this circuit.
  5. You implemented a 1 Mohm pulldown resistor (R11) in your schematic to define a close to zero reading at open input. This is a good idea, but introduces a small linearity error because it is a load for the potentiometer. At mid point wiper position the error is around 13 mV and your ADC would see this. So 10 Mohm is big enough to avoid this problem here with the drawback that the input bias current of the OpAmp will produce a slightly bigger offset voltage at open input.
  6. You have two reference voltages here, the more or less exact 10 V of the linear regulator - voltage drop across 1 kohm, and the 3.3 V reference of the MCU. You should consider to measure the 10 V or 12 V point of the potentiometer supply with a separate ADC and to interpret the measurements of all channels relative to this value to improve the accuracy.
  7. Verify, that the LM358 can follow the maximum potentiometer voltage at the output with a 12 V supply. Another OpAmp with rail to rail output would be on the safe side.
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