This is my first time designing an analog signal conditioning circuit for ADC inputs.
The card will have up to eight analog inputs connected to eight STM32F207ZG ADC channels (stm32 mcu datasheet).
The microcontroller ADC channels are 12 bit. It means 4095 level steps. Result could be saved left or right aligned in a 16bit register.
Every analog signal is up to maximum voltage Vmax = 10V to minimum voltage Vmin >= 0V.
I was searching for information, theory and examples for doing this. I have seen several options, but I'm not sure which one could be the best.
I know I need to reduce Vmax to ADC Vref maximum = 3.3V and Vmin to 0V (when no offset is present). A voltage divider could help with it. Furthermore it is needed to keep input circuits impedance effects away from ADC input. Follower op-amp could also help with it.
I have selected the 3 more interesting ideas for doing this, based on voltage divisor and op-amps.
- Some one uses a voltage follower op-amp with the analog input signal connected to the non-inverting terminal. A voltage divider is connected to the output op-amp. This author puts a parallel Zener at the output node, before the ADC input.
- A subversion way uses another voltage follower op-amp instead of Zener diode.
- Some other one uses a voltage divider connected to the non-inverting follower op-amp terminal. Its output is directly connected to the ADC input.
When the circuit needs an offset some authors suggest a way for adjusting it with a potentiometer in a voltage divider:
If my analog voltage has a range from 1V to 9.5V (not exactly from 10V to 0V) I know how to reduce the maximum value and how to create an offset voltage. At first I didn't know how to join these two circuits, but I have realised that I have two solutions:
Using a substract op_amp with R1=R2=R3=R4 I could get a gain = 1 substract (Vin - Vref) operation but I would need:
op_amp with negative voltage
2 voltage divider: for voltage reductor and for offset generation
two follower op_amp (maybe less): one is connected to one voltage divider and the other one to the adc input pin)
Don't connect an offset voltage and to work as if the offset doesn't matters (as in circuit number 2). Of course it will miss a part of the whole ADC travel, it's said some of precision. I have done some calculations and the system could allow this precision missing. Hence, I will need:
two voltage divider
two follower op_amp (maybe less)
no negative voltage --> it could be powered by single supply
My questions refered to both solutions:
- Can the first and second solutions be optimized reducing/saving some of the components (especially op-amps)? I'm not sure if the 1M ohm resistor -from sensor circuit- would help to stop current and acting as a barrier between two parts -I have read a way for saving them could be using resistors with much bigger values than the first ones when connecting two circuits like these-
- At second circuit what thing is better: to connect a follower op-amp to the adc input pin or to connect the zener diode instead (one of the above proposal)?
- Could the substract op_amp bei powered by a single supply and not use a negative voltage? so connecting GND to the negative supply terminal. What about follower op-amp? Can they work negative pin sourced by GND instead of negative voltages (two both circuits)?
- If it is not too much to ask for, I would like also ask for which op-amp (how to choose one device for my application) you would use.
More information about analog signal nature (origin):
PS732 feinmetall 3 terminal sensor:
The 3 sensor terminals are shown in the circuit connection:
Only Vout is the input signal on my design card:
How are the sensors powered? Power comes from an external power bank that is feeding the system cards.
Manufacturer ADC input specifications: